| Message ID | 20210226065758.547824-3-andrew@aj.id.au (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | aspeed: LPC peripheral controller devices | expand |
On 2/26/21 7:57 AM, Andrew Jeffery wrote: > The AST2600 allocates individual GIC IRQ lines for the LPC sub-devices. > This is a contrast to the AST2400 and AST2500 which use one shared VIC > IRQ line for the LPC sub-devices. Switch the iBT device to use the > GIC IRQ ID documented in the datasheet. [*] > > While we're here, set the number of IRQs to the allocated number of IRQs > in the datasheet. Please do one change per patch. This would be the first change, and [*] is the second. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > --- > hw/arm/aspeed_ast2600.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-)
On Fri, 26 Feb 2021, at 19:28, Philippe Mathieu-Daudé wrote: > On 2/26/21 7:57 AM, Andrew Jeffery wrote: > > The AST2600 allocates individual GIC IRQ lines for the LPC sub-devices. > > This is a contrast to the AST2400 and AST2500 which use one shared VIC > > IRQ line for the LPC sub-devices. Switch the iBT device to use the > > GIC IRQ ID documented in the datasheet. > > [*] > > > > > While we're here, set the number of IRQs to the allocated number of IRQs > > in the datasheet. > > Please do one change per patch. This would be the first change, > and [*] is the second. Given that I had to change the current value to support the iBT device I figured it would be fine in the same patch, but sure, I can split this out in v2. Andrew
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index bc0eeb058b24..2125a96ef317 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -65,7 +65,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { #define ASPEED_A7MPCORE_ADDR 0x40460000 -#define AST2600_MAX_IRQ 128 +#define AST2600_MAX_IRQ 197 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ static const int aspeed_soc_ast2600_irqmap[] = { @@ -98,7 +98,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_DEV_WDT] = 24, [ASPEED_DEV_PWM] = 44, [ASPEED_DEV_LPC] = 35, - [ASPEED_DEV_IBT] = 35, /* LPC */ + [ASPEED_DEV_IBT] = 143, [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */ [ASPEED_DEV_ETH1] = 2, [ASPEED_DEV_ETH2] = 3,
The AST2600 allocates individual GIC IRQ lines for the LPC sub-devices. This is a contrast to the AST2400 and AST2500 which use one shared VIC IRQ line for the LPC sub-devices. Switch the iBT device to use the GIC IRQ ID documented in the datasheet. While we're here, set the number of IRQs to the allocated number of IRQs in the datasheet. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- hw/arm/aspeed_ast2600.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)