Message ID | 1614540807-30686-13-git-send-email-sai.pavan.boddu@xilinx.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | eMMC support | expand |
* Sai Pavan Boddu (sai.pavan.boddu@xilinx.com) wrote: > eMMC cards support tuning sequence for entering HS200 mode. > > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > hw/sd/sd.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index bf963ec..174c28e 100644 > --- a/hw/sd/sd.c > +++ b/hw/sd/sd.c > @@ -1386,6 +1386,14 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) > } > break; > > + case 21: /* CMD21: mmc SEND TUNING_BLOCK */ > + if (sd->emmc && (sd->state == sd_transfer_state)) { > + sd->state = sd_sendingdata_state; > + sd->data_offset = 0; > + return sd_r1; > + } > + break; > + > case 23: /* CMD23: SET_BLOCK_COUNT */ > if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { > break; > @@ -2120,6 +2128,30 @@ static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = { > 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, > }; > > +#define EXCSD_BUS_WIDTH_OFFSET 183 > +#define BUS_WIDTH_8_MASK 0x4 > +#define BUS_WIDTH_4_MASK 0x2 > +#define MMC_TUNING_BLOCK_SIZE 128 > + > +static const uint8_t mmc_tunning_block_pattern[128] = { > + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, > + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, > + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, > + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, > + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, > + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, > + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, > + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, > + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, > + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, > + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, > + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, > + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, > + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, > + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, > + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, Where does this magic pattern come from? Is it part of some spec? Dave > +}; > + > uint8_t sd_read_byte(SDState *sd) > { > /* TODO: Append CRCs */ > @@ -2213,6 +2245,21 @@ uint8_t sd_read_byte(SDState *sd) > ret = sd_tuning_block_pattern[sd->data_offset++]; > break; > > + case 21: /* CMD21: SEND_TUNNING_BLOCK (MMC) */ > + if (sd->data_offset >= MMC_TUNING_BLOCK_SIZE - 1) { > + sd->state = sd_transfer_state; > + } > + if (sd->ext_csd[EXCSD_BUS_WIDTH_OFFSET] & BUS_WIDTH_8_MASK) { > + ret = mmc_tunning_block_pattern[sd->data_offset++]; > + } else { > + /* Return LSB Nibbles of two byte from the 8bit tuning block > + * for 4bit mode > + */ > + ret = mmc_tunning_block_pattern[sd->data_offset++] & 0x0F; > + ret |= (mmc_tunning_block_pattern[sd->data_offset++] & 0x0F) << 4; > + } > + break; > + > case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */ > ret = sd->data[sd->data_offset ++]; > > -- > 2.7.4 >
Hi David, > -----Original Message----- > From: Dr. David Alan Gilbert <dgilbert@redhat.com> > Sent: Monday, March 1, 2021 4:12 PM > To: Sai Pavan Boddu <saipava@xilinx.com> > Cc: Markus Armbruster <armbru@redhat.com>; Kevin Wolf > <kwolf@redhat.com>; Max Reitz <mreitz@redhat.com>; Vladimir Sementsov- > Ogievskiy <vsementsov@virtuozzo.com>; Eric Blake <eblake@redhat.com>; > Joel Stanley <joel@jms.id.au>; Cédric Le Goater <clg@kaod.org>; Vincent > Palatin <vpalatin@chromium.org>; Thomas Huth <thuth@redhat.com>; Stefan > Hajnoczi <stefanha@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; > Alistair Francis <alistair.francis@wdc.com>; Edgar Iglesias <edgari@xilinx.com>; > Luc Michel <luc.michel@greensocs.com>; Paolo Bonzini > <pbonzini@redhat.com>; qemu-block@nongnu.org; qemu-devel@nongnu.org; > Sai Pavan Boddu <saipava@xilinx.com> > Subject: Re: [PATCH v3 12/21] sd: emmc: add CMD21 tuning sequence > > * Sai Pavan Boddu (sai.pavan.boddu@xilinx.com) wrote: > > eMMC cards support tuning sequence for entering HS200 mode. > > > > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > > --- > > hw/sd/sd.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 47 insertions(+) > > > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > > index bf963ec..174c28e 100644 > > --- a/hw/sd/sd.c > > +++ b/hw/sd/sd.c > > @@ -1386,6 +1386,14 @@ static sd_rsp_type_t > sd_normal_command(SDState *sd, SDRequest req) > > } > > break; > > > > + case 21: /* CMD21: mmc SEND TUNING_BLOCK */ > > + if (sd->emmc && (sd->state == sd_transfer_state)) { > > + sd->state = sd_sendingdata_state; > > + sd->data_offset = 0; > > + return sd_r1; > > + } > > + break; > > + > > case 23: /* CMD23: SET_BLOCK_COUNT */ > > if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { > > break; > > @@ -2120,6 +2128,30 @@ static const uint8_t > sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = { > > 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, > > }; > > > > +#define EXCSD_BUS_WIDTH_OFFSET 183 > > +#define BUS_WIDTH_8_MASK 0x4 > > +#define BUS_WIDTH_4_MASK 0x2 > > +#define MMC_TUNING_BLOCK_SIZE 128 > > + > > +static const uint8_t mmc_tunning_block_pattern[128] = { > > + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, > > + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, > > + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, > > + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, > > + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, > > + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, > > + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, > > + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, > > + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, > > + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, > > + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, > > + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, > > + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, > > + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, > > + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, > > + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, > > Where does this magic pattern come from? Is it part of some spec? [Sai Pavan Boddu] Yes its part of JEDEC eMMC spec. It's the tuning sequence for HS200 mode. Regards, Sai Pavan > > Dave > > > +}; > > + > > uint8_t sd_read_byte(SDState *sd) > > { > > /* TODO: Append CRCs */ > > @@ -2213,6 +2245,21 @@ uint8_t sd_read_byte(SDState *sd) > > ret = sd_tuning_block_pattern[sd->data_offset++]; > > break; > > > > + case 21: /* CMD21: SEND_TUNNING_BLOCK (MMC) */ > > + if (sd->data_offset >= MMC_TUNING_BLOCK_SIZE - 1) { > > + sd->state = sd_transfer_state; > > + } > > + if (sd->ext_csd[EXCSD_BUS_WIDTH_OFFSET] & BUS_WIDTH_8_MASK) { > > + ret = mmc_tunning_block_pattern[sd->data_offset++]; > > + } else { > > + /* Return LSB Nibbles of two byte from the 8bit tuning block > > + * for 4bit mode > > + */ > > + ret = mmc_tunning_block_pattern[sd->data_offset++] & 0x0F; > > + ret |= (mmc_tunning_block_pattern[sd->data_offset++] & 0x0F) << 4; > > + } > > + break; > > + > > case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */ > > ret = sd->data[sd->data_offset ++]; > > > > -- > > 2.7.4 > > > -- > Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
* Sai Pavan Boddu (saipava@xilinx.com) wrote: > Hi David, > > > -----Original Message----- > > From: Dr. David Alan Gilbert <dgilbert@redhat.com> > > Sent: Monday, March 1, 2021 4:12 PM > > To: Sai Pavan Boddu <saipava@xilinx.com> > > Cc: Markus Armbruster <armbru@redhat.com>; Kevin Wolf > > <kwolf@redhat.com>; Max Reitz <mreitz@redhat.com>; Vladimir Sementsov- > > Ogievskiy <vsementsov@virtuozzo.com>; Eric Blake <eblake@redhat.com>; > > Joel Stanley <joel@jms.id.au>; Cédric Le Goater <clg@kaod.org>; Vincent > > Palatin <vpalatin@chromium.org>; Thomas Huth <thuth@redhat.com>; Stefan > > Hajnoczi <stefanha@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; > > Alistair Francis <alistair.francis@wdc.com>; Edgar Iglesias <edgari@xilinx.com>; > > Luc Michel <luc.michel@greensocs.com>; Paolo Bonzini > > <pbonzini@redhat.com>; qemu-block@nongnu.org; qemu-devel@nongnu.org; > > Sai Pavan Boddu <saipava@xilinx.com> > > Subject: Re: [PATCH v3 12/21] sd: emmc: add CMD21 tuning sequence > > > > * Sai Pavan Boddu (sai.pavan.boddu@xilinx.com) wrote: > > > eMMC cards support tuning sequence for entering HS200 mode. > > > > > > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> > > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > > > --- > > > hw/sd/sd.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ > > > 1 file changed, 47 insertions(+) > > > > > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > > > index bf963ec..174c28e 100644 > > > --- a/hw/sd/sd.c > > > +++ b/hw/sd/sd.c > > > @@ -1386,6 +1386,14 @@ static sd_rsp_type_t > > sd_normal_command(SDState *sd, SDRequest req) > > > } > > > break; > > > > > > + case 21: /* CMD21: mmc SEND TUNING_BLOCK */ > > > + if (sd->emmc && (sd->state == sd_transfer_state)) { > > > + sd->state = sd_sendingdata_state; > > > + sd->data_offset = 0; > > > + return sd_r1; > > > + } > > > + break; > > > + > > > case 23: /* CMD23: SET_BLOCK_COUNT */ > > > if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { > > > break; > > > @@ -2120,6 +2128,30 @@ static const uint8_t > > sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = { > > > 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, > > > }; > > > > > > +#define EXCSD_BUS_WIDTH_OFFSET 183 > > > +#define BUS_WIDTH_8_MASK 0x4 > > > +#define BUS_WIDTH_4_MASK 0x2 > > > +#define MMC_TUNING_BLOCK_SIZE 128 > > > + > > > +static const uint8_t mmc_tunning_block_pattern[128] = { > > > + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, > > > + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, > > > + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, > > > + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, > > > + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, > > > + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, > > > + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, > > > + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, > > > + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, > > > + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, > > > + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, > > > + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, > > > + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, > > > + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, > > > + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, > > > + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, > > > > Where does this magic pattern come from? Is it part of some spec? > [Sai Pavan Boddu] Yes its part of JEDEC eMMC spec. It's the tuning sequence for HS200 mode. OK, if you have to repost it, then please add a comment saying that. DAve > Regards, > Sai Pavan > > > > Dave > > > > > +}; > > > + > > > uint8_t sd_read_byte(SDState *sd) > > > { > > > /* TODO: Append CRCs */ > > > @@ -2213,6 +2245,21 @@ uint8_t sd_read_byte(SDState *sd) > > > ret = sd_tuning_block_pattern[sd->data_offset++]; > > > break; > > > > > > + case 21: /* CMD21: SEND_TUNNING_BLOCK (MMC) */ > > > + if (sd->data_offset >= MMC_TUNING_BLOCK_SIZE - 1) { > > > + sd->state = sd_transfer_state; > > > + } > > > + if (sd->ext_csd[EXCSD_BUS_WIDTH_OFFSET] & BUS_WIDTH_8_MASK) { > > > + ret = mmc_tunning_block_pattern[sd->data_offset++]; > > > + } else { > > > + /* Return LSB Nibbles of two byte from the 8bit tuning block > > > + * for 4bit mode > > > + */ > > > + ret = mmc_tunning_block_pattern[sd->data_offset++] & 0x0F; > > > + ret |= (mmc_tunning_block_pattern[sd->data_offset++] & 0x0F) << 4; > > > + } > > > + break; > > > + > > > case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */ > > > ret = sd->data[sd->data_offset ++]; > > > > > > -- > > > 2.7.4 > > > > > -- > > Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK >
diff --git a/hw/sd/sd.c b/hw/sd/sd.c index bf963ec..174c28e 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1386,6 +1386,14 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) } break; + case 21: /* CMD21: mmc SEND TUNING_BLOCK */ + if (sd->emmc && (sd->state == sd_transfer_state)) { + sd->state = sd_sendingdata_state; + sd->data_offset = 0; + return sd_r1; + } + break; + case 23: /* CMD23: SET_BLOCK_COUNT */ if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { break; @@ -2120,6 +2128,30 @@ static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = { 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, }; +#define EXCSD_BUS_WIDTH_OFFSET 183 +#define BUS_WIDTH_8_MASK 0x4 +#define BUS_WIDTH_4_MASK 0x2 +#define MMC_TUNING_BLOCK_SIZE 128 + +static const uint8_t mmc_tunning_block_pattern[128] = { + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, +}; + uint8_t sd_read_byte(SDState *sd) { /* TODO: Append CRCs */ @@ -2213,6 +2245,21 @@ uint8_t sd_read_byte(SDState *sd) ret = sd_tuning_block_pattern[sd->data_offset++]; break; + case 21: /* CMD21: SEND_TUNNING_BLOCK (MMC) */ + if (sd->data_offset >= MMC_TUNING_BLOCK_SIZE - 1) { + sd->state = sd_transfer_state; + } + if (sd->ext_csd[EXCSD_BUS_WIDTH_OFFSET] & BUS_WIDTH_8_MASK) { + ret = mmc_tunning_block_pattern[sd->data_offset++]; + } else { + /* Return LSB Nibbles of two byte from the 8bit tuning block + * for 4bit mode + */ + ret = mmc_tunning_block_pattern[sd->data_offset++] & 0x0F; + ret |= (mmc_tunning_block_pattern[sd->data_offset++] & 0x0F) << 4; + } + break; + case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */ ret = sd->data[sd->data_offset ++];