| Message ID | 20210228135311.668-1-antti.jarvinen@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | [v2] PCI: quirk for preventing bus reset on TI C667X | expand |
Hi Antti, A few nitpicks, so feel free to ignore these, of course. If possible, capitalise the subject line. Also, perhaps "Add quirk to prevent bus (...)" might read better. > Some TI keystone C667X devices do no support bus/hot reset. Its PCIESS [...] It would be KeyStone in the above sentence. [...] > With this change device can be assigned to VMs with VFIO, but it will > leak state between VMs. Following-up on Bojrn's question about the state leak, see: https://lore.kernel.org/linux-pci/20210129234946.GA124037@bjorn-Precision-5520/ Would there be anything else that has to be done? Krzysztof
On 7.3.2021 2.22, Krzysztof Wilczyński wrote: > Hi Antti, > > A few nitpicks, so feel free to ignore these, of course. > > If possible, capitalise the subject line. Also, perhaps "Add quirk to > prevent bus (...)" might read better. > >> Some TI keystone C667X devices do no support bus/hot reset. Its PCIESS > [...] > > It would be KeyStone in the above sentence. > > [...] >> With this change device can be assigned to VMs with VFIO, but it will >> leak state between VMs. > > Following-up on Bojrn's question about the state leak, see: > https://lore.kernel.org/linux-pci/20210129234946.GA124037@bjorn-Precision-5520/ > > Would there be anything else that has to be done? > To my understanding this is all that needs to be done. At least on other similar case, adding quirk was the only change https://lore.kernel.org/patchwork/patch/1086083/
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 653660e3ba9e..d9201ad1ca39 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3578,6 +3578,16 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset); */ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset); +/* + * Some TI keystone C667X devices do no support bus/hot reset. + * Its PCIESS automatically disables LTSSM when secondary bus reset is + * received and device stops working. Prevent bus reset by adding + * quirk_no_bus_reset to the device. With this change device can be + * assigned to VMs with VFIO, but it will leak state between VMs. + * Reference https://e2e.ti.com/support/processors/f/791/t/954382 + */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, 0xb005, quirk_no_bus_reset); + static void quirk_no_pm_reset(struct pci_dev *dev) { /*
Some TI keystone C667X devices do no support bus/hot reset. Its PCIESS automatically disables LTSSM when secondary bus reset is received and device stops working. Prevent bus reset by adding quirk_no_bus_reset to the device. With this change device can be assigned to VMs with VFIO, but it will leak state between VMs. Reference https://e2e.ti.com/support/processors/f/791/t/954382 Signed-off-by: Antti Järvinen <antti.jarvinen@gmail.com> --- drivers/pci/quirks.c | 10 ++++++++++ 1 file changed, 10 insertions(+)