| Message ID | 20210315145938.58565-4-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mmc: renesas_sdhi: reset via reset controller | expand |
Hi Wolfram, On Mon, Mar 15, 2021 at 4:00 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > All recent SDHI instances can be reset via the reset controller. If one > is found, use it instead of the open coded reset. This is to get a > future-proof sane reset state. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Thanks for your patch! > --- a/drivers/mmc/host/Kconfig > +++ b/drivers/mmc/host/Kconfig > @@ -707,6 +707,7 @@ config MMC_SDHI > tristate "Renesas SDHI SD/SDIO controller support" > depends on SUPERH || ARCH_RENESAS || COMPILE_TEST > select MMC_TMIO_CORE > + select RESET_CONTROLLER ... if ARCH_RENESAS? While RESET_CONTROLLER can be enabled on SuperH (and compiles), there are no reset drivers for SuperH, so it won't be used anyway. > help > This provides support for the SDHI SD/SDIO controller found in > Renesas SuperH, ARM and ARM64 based SoCs Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
> > + select RESET_CONTROLLER > > ... if ARCH_RENESAS? > > While RESET_CONTROLLER can be enabled on SuperH (and compiles), > there are no reset drivers for SuperH, so it won't be used anyway. Yeah, I also thought about it and decided against it. Because a new arch will then support resets out of the box while the overhead for old archs is negligible, I'd think. But no strong opinion here.
Hi Wolfram, On Tue, Mar 16, 2021 at 1:57 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > > > + select RESET_CONTROLLER > > > > ... if ARCH_RENESAS? > > > > While RESET_CONTROLLER can be enabled on SuperH (and compiles), > > there are no reset drivers for SuperH, so it won't be used anyway. > > Yeah, I also thought about it and decided against it. Because a new arch > will then support resets out of the box while the overhead for old archs > is negligible, I'd think. Enabling RESET_CONTROLLER on SH increases kernel size by ca. 4 KiB. Gr{oetje,eeting}s, Geert
> Enabling RESET_CONTROLLER on SH increases kernel size by ca. 4 KiB.
Well, I read this as "I insist on ARCH_RENESAS" ;) Will resend later or
tomorrow.
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index b236dfe2e879..1f1b691f10ce 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -707,6 +707,7 @@ config MMC_SDHI tristate "Renesas SDHI SD/SDIO controller support" depends on SUPERH || ARCH_RENESAS || COMPILE_TEST select MMC_TMIO_CORE + select RESET_CONTROLLER help This provides support for the SDHI SD/SDIO controller found in Renesas SuperH, ARM and ARM64 based SoCs diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h index cb962c7883dc..53eded81a53e 100644 --- a/drivers/mmc/host/renesas_sdhi.h +++ b/drivers/mmc/host/renesas_sdhi.h @@ -70,6 +70,8 @@ struct renesas_sdhi { DECLARE_BITMAP(smpcmp, BITS_PER_LONG); unsigned int tap_num; unsigned int tap_set; + + struct reset_control *rstc; }; #define host_to_priv(host) \ diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index db753829eaf6..d36181b6f687 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -20,6 +20,7 @@ #include <linux/clk.h> #include <linux/delay.h> +#include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/mfd/tmio.h> #include <linux/mmc/host.h> @@ -32,6 +33,7 @@ #include <linux/platform_device.h> #include <linux/pm_domain.h> #include <linux/regulator/consumer.h> +#include <linux/reset.h> #include <linux/sh_dma.h> #include <linux/slab.h> #include <linux/sys_soc.h> @@ -572,10 +574,19 @@ static void renesas_sdhi_scc_reset(struct tmio_mmc_host *host, struct renesas_sd static void renesas_sdhi_reset(struct tmio_mmc_host *host) { struct renesas_sdhi *priv = host_to_priv(host); + int ret; u16 val; - if (priv->scc_ctl) + if (priv->rstc) { + reset_control_reset(priv->rstc); + /* Unknown why but without polling reset status, it will hang */ + read_poll_timeout(reset_control_status, ret, ret == 0, 1, 100, + false, priv->rstc); + priv->needs_adjust_hs400 = false; + renesas_sdhi_set_clock(host, host->clk_cache); + } else if (priv->scc_ctl) { renesas_sdhi_scc_reset(host, priv); + } sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_ALL_RCAR2); @@ -1081,6 +1092,10 @@ int renesas_sdhi_probe(struct platform_device *pdev, if (ret) goto efree; + priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + if (IS_ERR(priv->rstc)) + return PTR_ERR(priv->rstc); + ver = sd_ctrl_read16(host, CTL_VERSION); /* GEN2_SDR104 is first known SDHI to use 32bit block count */ if (ver < SDHI_VER_GEN2_SDR104 && mmc_data->max_blk_count > U16_MAX)
All recent SDHI instances can be reset via the reset controller. If one is found, use it instead of the open coded reset. This is to get a future-proof sane reset state. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- drivers/mmc/host/Kconfig | 1 + drivers/mmc/host/renesas_sdhi.h | 2 ++ drivers/mmc/host/renesas_sdhi_core.c | 17 ++++++++++++++++- 3 files changed, 19 insertions(+), 1 deletion(-)