| Message ID | 1615879102-45919-1-git-send-email-shawn.lin@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v6,1/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Convert to yaml file | expand |
On Tue, 16 Mar 2021 at 08:18, Shawn Lin <shawn.lin@rock-chips.com> wrote: > > This patch converts sdhci-of-dwcmshc.txt to sdhci-of-dwcmshc.yaml > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > Reviewed-by: Rob Herring <robh@kernel.org> Applied for next, thanks! Kind regards Uffe > --- > > Changes in v6: None > Changes in v5: None > Changes in v4: > - add tag from Rob > Series-changes: 3 > - fix filename and other improvments suggested by Rob > > .../devicetree/bindings/mmc/sdhci-of-dwcmshc.txt | 20 ------- > .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 63 ++++++++++++++++++++++ > 2 files changed, 63 insertions(+), 20 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt > create mode 100644 Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt > deleted file mode 100644 > index ee4253b..0000000 > --- a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt > +++ /dev/null > @@ -1,20 +0,0 @@ > -* Synopsys DesignWare Cores Mobile Storage Host Controller > - > -Required properties: > -- compatible: should be one of the following: > - "snps,dwcmshc-sdhci" > -- reg: offset and length of the register set for the device. > -- interrupts: a single interrupt specifier. > -- clocks: Array of clocks required for SDHCI; requires at least one for > - core clock. > -- clock-names: Array of names corresponding to clocks property; shall be > - "core" for core clock and "bus" for optional bus clock. > - > -Example: > - sdhci2: sdhci@aa0000 { > - compatible = "snps,dwcmshc-sdhci"; > - reg = <0xaa0000 0x1000>; > - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&emmcclk>; > - bus-width = <8>; > - } > diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > new file mode 100644 > index 0000000..f99fb9f > --- /dev/null > +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > @@ -0,0 +1,63 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Synopsys Designware Mobile Storage Host Controller Binding > + > +maintainers: > + - Ulf Hansson <ulf.hansson@linaro.org> > + - Jisheng Zhang <Jisheng.Zhang@synaptics.com> > + > +allOf: > + - $ref: mmc-controller.yaml# > + > +properties: > + compatible: > + enum: > + - snps,dwcmshc-sdhci > + > + reg: > + minItems: 1 > + items: > + - description: Offset and length of the register set for the device > + > + interrupts: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + items: > + - description: core clock > + - description: bus clock for optional > + > + clock-names: > + minItems: 1 > + items: > + - const: core > + - const: bus > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + > +unevaluatedProperties: false > + > +examples: > + - | > + mmc@aa0000 { > + compatible = "snps,dwcmshc-sdhci"; > + reg = <0xaa000 0x1000>; > + interrupts = <0 25 0x4>; > + clocks = <&cru 17>, <&cru 18>; > + clock-names = "core", "bus"; > + bus-width = <8>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > +... > -- > 2.7.4 > > >
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt deleted file mode 100644 index ee4253b..0000000 --- a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Synopsys DesignWare Cores Mobile Storage Host Controller - -Required properties: -- compatible: should be one of the following: - "snps,dwcmshc-sdhci" -- reg: offset and length of the register set for the device. -- interrupts: a single interrupt specifier. -- clocks: Array of clocks required for SDHCI; requires at least one for - core clock. -- clock-names: Array of names corresponding to clocks property; shall be - "core" for core clock and "bus" for optional bus clock. - -Example: - sdhci2: sdhci@aa0000 { - compatible = "snps,dwcmshc-sdhci"; - reg = <0xaa0000 0x1000>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&emmcclk>; - bus-width = <8>; - } diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml new file mode 100644 index 0000000..f99fb9f --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys Designware Mobile Storage Host Controller Binding + +maintainers: + - Ulf Hansson <ulf.hansson@linaro.org> + - Jisheng Zhang <Jisheng.Zhang@synaptics.com> + +allOf: + - $ref: mmc-controller.yaml# + +properties: + compatible: + enum: + - snps,dwcmshc-sdhci + + reg: + minItems: 1 + items: + - description: Offset and length of the register set for the device + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: core clock + - description: bus clock for optional + + clock-names: + minItems: 1 + items: + - const: core + - const: bus + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + mmc@aa0000 { + compatible = "snps,dwcmshc-sdhci"; + reg = <0xaa000 0x1000>; + interrupts = <0 25 0x4>; + clocks = <&cru 17>, <&cru 18>; + clock-names = "core", "bus"; + bus-width = <8>; + #address-cells = <1>; + #size-cells = <0>; + }; + +...