| Message ID | 20210315131848.31840-1-mark-pk.tsai@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4] irqchip/irq-mst: Support polarity configuration | expand |
From: Mark-PK Tsai <mark-pk.tsai@mediatek.com> To: Marc Zyngier <maz@kernel.org> Cc: Mark-PK Tsai <mark-pk.tsai@mediatek.com>, Daniel Palmer <daniel@thingy.jp>, Thomas Gleixner <tglx@linutronix.de>, Matthias Brugger <matthias.bgg@gmail.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <yj.chiang@mediatek.com> Subject: [PATCH v4] irqchip/irq-mst: Support polarity configuration Date: Mon, 15 Mar 2021 21:18:48 +0800 > Support irq polarity configuration and save and restore the config > when system suspend and resume. > > Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com> Hi, Could anyone please help to review this patch?
On Mon, 15 Mar 2021 13:18:48 +0000, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote: > > Support irq polarity configuration and save and restore the config > when system suspend and resume. > > Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com> > --- > drivers/irqchip/irq-mst-intc.c | 94 ++++++++++++++++++++++++++++++++-- > 1 file changed, 91 insertions(+), 3 deletions(-) > > diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c > index 143657b0cf28..a2ab3f837b96 100644 > --- a/drivers/irqchip/irq-mst-intc.c > +++ b/drivers/irqchip/irq-mst-intc.c > @@ -13,15 +13,27 @@ > #include <linux/of_irq.h> > #include <linux/slab.h> > #include <linux/spinlock.h> > +#include <linux/syscore_ops.h> > > -#define INTC_MASK 0x0 > -#define INTC_EOI 0x20 > +#define MST_INTC_MAX_IRQS 64 > + > +#define INTC_MASK 0x0 > +#define INTC_REV_POLARITY 0x10 > +#define INTC_EOI 0x20 > + > +#ifdef CONFIG_PM_SLEEP > +static LIST_HEAD(mst_intc_list); > +#endif > > struct mst_intc_chip_data { > raw_spinlock_t lock; > unsigned int irq_start, nr_irqs; > void __iomem *base; > bool no_eoi; > +#ifdef CONFIG_PM_SLEEP > + struct list_head entry; > + u16 saved_polarity_conf[DIV_ROUND_UP(MST_INTC_MAX_IRQS, 16)]; > +#endif > }; > > static void mst_set_irq(struct irq_data *d, u32 offset) > @@ -78,6 +90,20 @@ static void mst_intc_eoi_irq(struct irq_data *d) > irq_chip_eoi_parent(d); > } > > +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type) > +{ > + if (type != IRQ_TYPE_EDGE_RISING && type != IRQ_TYPE_EDGE_FALLING && > + type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_LEVEL_LOW) > + return -EINVAL; All of this amounts to checking for IRQ_TYPE_{NONE,EDGE_BOTH}. Maybe that's a better option. > + > + if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) > + mst_set_irq(data, INTC_REV_POLARITY); What happens if the interrupt was set to LEVEL_LOW, then switched to LEVEL_HIGH? You end up with a stuck reversed polarity. > + > + type = IRQ_TYPE_LEVEL_HIGH; > + > + return irq_chip_set_type_parent(data, type); I'm going to fix this as below. Shout if you disagree. Thanks, M. diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c index a2ab3f837b96..f6133ae28155 100644 --- a/drivers/irqchip/irq-mst-intc.c +++ b/drivers/irqchip/irq-mst-intc.c @@ -92,16 +92,20 @@ static void mst_intc_eoi_irq(struct irq_data *d) static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type) { - if (type != IRQ_TYPE_EDGE_RISING && type != IRQ_TYPE_EDGE_FALLING && - type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_LEVEL_LOW) - return -EINVAL; - - if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) + switch (type) { + case IRQ_TYPE_LEVEL_LOW: + case IRQ_TYPE_EDGE_FALLING: mst_set_irq(data, INTC_REV_POLARITY); + break; + case IRQ_TYPE_LEVEL_HIGH: + case IRQ_TYPE_EDGE_RISING: + mst_clear_irq(data, INTC_REV_POLARITY); + break; + default: + return -EINVAL; + } - type = IRQ_TYPE_LEVEL_HIGH; - - return irq_chip_set_type_parent(data, type); + return irq_chip_set_type_parent(data, IRQ_TYPE_LEVEL_HIGH); } static struct irq_chip mst_intc_chip = {
On Mon, 15 Mar 2021 21:18:48 +0800, Mark-PK Tsai wrote: > Support irq polarity configuration and save and restore the config > when system suspend and resume. Applied to irq/irqchip-next, thanks! [1/1] irqchip/irq-mst: Support polarity configuration commit: ea4aeaa5c88906eb3ca3d7d3d17a45605d2dd0de Cheers, M.
diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c index 143657b0cf28..a2ab3f837b96 100644 --- a/drivers/irqchip/irq-mst-intc.c +++ b/drivers/irqchip/irq-mst-intc.c @@ -13,15 +13,27 @@ #include <linux/of_irq.h> #include <linux/slab.h> #include <linux/spinlock.h> +#include <linux/syscore_ops.h> -#define INTC_MASK 0x0 -#define INTC_EOI 0x20 +#define MST_INTC_MAX_IRQS 64 + +#define INTC_MASK 0x0 +#define INTC_REV_POLARITY 0x10 +#define INTC_EOI 0x20 + +#ifdef CONFIG_PM_SLEEP +static LIST_HEAD(mst_intc_list); +#endif struct mst_intc_chip_data { raw_spinlock_t lock; unsigned int irq_start, nr_irqs; void __iomem *base; bool no_eoi; +#ifdef CONFIG_PM_SLEEP + struct list_head entry; + u16 saved_polarity_conf[DIV_ROUND_UP(MST_INTC_MAX_IRQS, 16)]; +#endif }; static void mst_set_irq(struct irq_data *d, u32 offset) @@ -78,6 +90,20 @@ static void mst_intc_eoi_irq(struct irq_data *d) irq_chip_eoi_parent(d); } +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type) +{ + if (type != IRQ_TYPE_EDGE_RISING && type != IRQ_TYPE_EDGE_FALLING && + type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + + if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) + mst_set_irq(data, INTC_REV_POLARITY); + + type = IRQ_TYPE_LEVEL_HIGH; + + return irq_chip_set_type_parent(data, type); +} + static struct irq_chip mst_intc_chip = { .name = "mst-intc", .irq_mask = mst_intc_mask_irq, @@ -87,13 +113,62 @@ static struct irq_chip mst_intc_chip = { .irq_set_irqchip_state = irq_chip_set_parent_state, .irq_set_affinity = irq_chip_set_affinity_parent, .irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent, - .irq_set_type = irq_chip_set_type_parent, + .irq_set_type = mst_irq_chip_set_type, .irq_retrigger = irq_chip_retrigger_hierarchy, .flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, }; +#ifdef CONFIG_PM_SLEEP +static void mst_intc_polarity_save(struct mst_intc_chip_data *cd) +{ + int i; + void __iomem *addr = cd->base + INTC_REV_POLARITY; + + for (i = 0; i < DIV_ROUND_UP(cd->nr_irqs, 16); i++) + cd->saved_polarity_conf[i] = readw_relaxed(addr + i * 4); +} + +static void mst_intc_polarity_restore(struct mst_intc_chip_data *cd) +{ + int i; + void __iomem *addr = cd->base + INTC_REV_POLARITY; + + for (i = 0; i < DIV_ROUND_UP(cd->nr_irqs, 16); i++) + writew_relaxed(cd->saved_polarity_conf[i], addr + i * 4); +} + +static void mst_irq_resume(void) +{ + struct mst_intc_chip_data *cd; + + list_for_each_entry(cd, &mst_intc_list, entry) + mst_intc_polarity_restore(cd); +} + +static int mst_irq_suspend(void) +{ + struct mst_intc_chip_data *cd; + + list_for_each_entry(cd, &mst_intc_list, entry) + mst_intc_polarity_save(cd); + return 0; +} + +static struct syscore_ops mst_irq_syscore_ops = { + .suspend = mst_irq_suspend, + .resume = mst_irq_resume, +}; + +static int __init mst_irq_pm_init(void) +{ + register_syscore_ops(&mst_irq_syscore_ops); + return 0; +} +late_initcall(mst_irq_pm_init); +#endif + static int mst_intc_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, @@ -145,6 +220,15 @@ static int mst_intc_domain_alloc(struct irq_domain *domain, unsigned int virq, parent_fwspec = *fwspec; parent_fwspec.fwnode = domain->parent->fwnode; parent_fwspec.param[1] = cd->irq_start + hwirq; + + /* + * mst-intc latch the interrupt request if it's edge triggered, + * so the output signal to parent GIC is always level sensitive. + * And if the irq signal is active low, configure it to active high + * to meet GIC SPI spec in mst_irq_chip_set_type via REV_POLARITY bit. + */ + parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH; + return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_fwspec); } @@ -193,6 +277,10 @@ static int __init mst_intc_of_init(struct device_node *dn, return -ENOMEM; } +#ifdef CONFIG_PM_SLEEP + INIT_LIST_HEAD(&cd->entry); + list_add_tail(&cd->entry, &mst_intc_list); +#endif return 0; }
Support irq polarity configuration and save and restore the config when system suspend and resume. Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com> --- drivers/irqchip/irq-mst-intc.c | 94 ++++++++++++++++++++++++++++++++-- 1 file changed, 91 insertions(+), 3 deletions(-)