| Message ID | 20210330013408.2532048-1-john.stultz@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 2b0b219e5ff8bcc673d3a2cb6f327b3c62c5637d |
| Headers | show |
| Series | drm/msm: Fix removal of valid error case when checking speed_bin | expand |
On 3/30/2021 7:04 AM, John Stultz wrote: > Commit 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to > access outside valid memory"), reworked the nvmem reading of > "speed_bin", but in doing so dropped handling of the -ENOENT > case which was previously documented as "fine". > > That change resulted in the db845c board display to fail to > start, with the following error: > > adreno 5000000.gpu: [drm:a6xx_gpu_init] *ERROR* failed to read speed-bin (-2). Some OPPs may not be supported by hardware > > Thus, this patch simply re-adds the ENOENT handling so the lack > of the speed_bin entry isn't fatal for display, and gets things > working on db845c. > > Cc: Rob Clark <robdclark@gmail.com> > Cc: Sean Paul <sean@poorly.run> > Cc: Jordan Crouse <jcrouse@codeaurora.org> > Cc: Eric Anholt <eric@anholt.net> > Cc: Douglas Anderson <dianders@chromium.org> > Cc: linux-arm-msm@vger.kernel.org > Cc: freedreno@lists.freedesktop.org > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: YongQin Liu <yongqin.liu@linaro.org> > Reported-by: YongQin Liu <yongqin.liu@linaro.org> > Fixes: 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to access outside valid memory") > Signed-off-by: John Stultz <john.stultz@linaro.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index 690409ca8a186..cb2df8736ca85 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -1406,7 +1406,13 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu, > int ret; > > ret = nvmem_cell_read_u16(dev, "speed_bin", &speedbin); > - if (ret) { > + /* > + * -ENOENT means that the platform doesn't support speedbin which is > + * fine > + */ > + if (ret == -ENOENT) { > + return 0; > + } else if (ret) { > DRM_DEV_ERROR(dev, > "failed to read speed-bin (%d). Some OPPs may not be supported by hardware", > ret); > Reviewed-by: Akhil P Oommen <akhilpo@codeaurora.org> This looks "fine" to me. ;) -Akhil.
Hi, On Mon, Mar 29, 2021 at 6:34 PM John Stultz <john.stultz@linaro.org> wrote: > > Commit 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to > access outside valid memory"), reworked the nvmem reading of > "speed_bin", but in doing so dropped handling of the -ENOENT > case which was previously documented as "fine". > > That change resulted in the db845c board display to fail to > start, with the following error: > > adreno 5000000.gpu: [drm:a6xx_gpu_init] *ERROR* failed to read speed-bin (-2). Some OPPs may not be supported by hardware > > Thus, this patch simply re-adds the ENOENT handling so the lack > of the speed_bin entry isn't fatal for display, and gets things > working on db845c. > > Cc: Rob Clark <robdclark@gmail.com> > Cc: Sean Paul <sean@poorly.run> > Cc: Jordan Crouse <jcrouse@codeaurora.org> > Cc: Eric Anholt <eric@anholt.net> > Cc: Douglas Anderson <dianders@chromium.org> > Cc: linux-arm-msm@vger.kernel.org > Cc: freedreno@lists.freedesktop.org > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: YongQin Liu <yongqin.liu@linaro.org> > Reported-by: YongQin Liu <yongqin.liu@linaro.org> > Fixes: 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to access outside valid memory") > Signed-off-by: John Stultz <john.stultz@linaro.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) Reviewed-by: Douglas Anderson <dianders@chromium.org>
On Mon, Mar 29, 2021 at 6:34 PM John Stultz <john.stultz@linaro.org> wrote: > > Commit 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to > access outside valid memory"), reworked the nvmem reading of > "speed_bin", but in doing so dropped handling of the -ENOENT > case which was previously documented as "fine". > > That change resulted in the db845c board display to fail to > start, with the following error: > > adreno 5000000.gpu: [drm:a6xx_gpu_init] *ERROR* failed to read speed-bin (-2). Some OPPs may not be supported by hardware > > Thus, this patch simply re-adds the ENOENT handling so the lack > of the speed_bin entry isn't fatal for display, and gets things > working on db845c. Hey Folks, Just wanted to re-ping you on this, as it resolves a regression introduced in 5.12-rc5 and I'm not yet seeing this in -next. Would be nice to have this in place before 5.12 final. thanks -john
Hello: This patch was applied to qcom/linux.git (refs/heads/for-next): On Tue, 30 Mar 2021 01:34:08 +0000 you wrote: > Commit 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to > access outside valid memory"), reworked the nvmem reading of > "speed_bin", but in doing so dropped handling of the -ENOENT > case which was previously documented as "fine". > > That change resulted in the db845c board display to fail to > start, with the following error: > > [...] Here is the summary with links: - drm/msm: Fix removal of valid error case when checking speed_bin https://git.kernel.org/qcom/c/2b0b219e5ff8 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 690409ca8a186..cb2df8736ca85 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1406,7 +1406,13 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu, int ret; ret = nvmem_cell_read_u16(dev, "speed_bin", &speedbin); - if (ret) { + /* + * -ENOENT means that the platform doesn't support speedbin which is + * fine + */ + if (ret == -ENOENT) { + return 0; + } else if (ret) { DRM_DEV_ERROR(dev, "failed to read speed-bin (%d). Some OPPs may not be supported by hardware", ret);
Commit 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to access outside valid memory"), reworked the nvmem reading of "speed_bin", but in doing so dropped handling of the -ENOENT case which was previously documented as "fine". That change resulted in the db845c board display to fail to start, with the following error: adreno 5000000.gpu: [drm:a6xx_gpu_init] *ERROR* failed to read speed-bin (-2). Some OPPs may not be supported by hardware Thus, this patch simply re-adds the ENOENT handling so the lack of the speed_bin entry isn't fatal for display, and gets things working on db845c. Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Eric Anholt <eric@anholt.net> Cc: Douglas Anderson <dianders@chromium.org> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: YongQin Liu <yongqin.liu@linaro.org> Reported-by: YongQin Liu <yongqin.liu@linaro.org> Fixes: 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to access outside valid memory") Signed-off-by: John Stultz <john.stultz@linaro.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)