diff mbox series

/msm/adreno: fix different address spaces warning

Message ID 20210331131313.60942-1-bernard@vivo.com (mailing list archive)
State Not Applicable, archived
Headers show
Series /msm/adreno: fix different address spaces warning | expand

Commit Message

Bernard Zhao March 31, 2021, 1:13 p.m. UTC 
Fixes the following sparse warnings:
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:189:9:    expected void [noderef] __iomem *addr
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:189:9:    got void *
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:190:9: warning: incorrect type in argument 2 (different address spaces)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:190:9:    expected void [noderef] __iomem *addr
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:190:9:    got void *
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:191:9: warning: incorrect type in argument 2 (different address spaces)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:191:9:    expected void [noderef] __iomem *addr
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:191:9:    got void *
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:192:9: warning: incorrect type in argument 2 (different address spaces)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:192:9:    expected void [noderef] __iomem *addr
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:192:9:    got void *
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:197:19: warning: incorrect type in argument 1 (different address spaces)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:197:19:    expected void const [noderef] __iomem *addr
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:197:19:    got void *
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:198:19: warning: incorrect type in argument 1 (different address spaces)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:198:19:    expected void const [noderef] __iomem *addr
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:198:19:    got void *
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:315:41: warning: incorrect type in argument 1 (different address spaces)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:315:41:    expected void *[noderef] __iomem cxdbg
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:315:41:    got void [noderef] __iomem *cxdbg
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:189:9: warning: dereference of noderef expression
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:190:9: warning: dereference of noderef expression
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:191:9: warning: dereference of noderef expression
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:192:9: warning: dereference of noderef expression
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:197:19: warning: dereference of noderef expression
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:198:19: warning: dereference of noderef expression

Signed-off-by: Bernard Zhao <bernard@vivo.com>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 36 ++++++++++-----------
 1 file changed, 18 insertions(+), 18 deletions(-)

Comments

kernel test robot March 31, 2021, 5:56 p.m. UTC | #1 
Hi Bernard,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc5 next-20210331]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Bernard-Zhao/msm-adreno-fix-different-address-spaces-warning/20210331-212535
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 5e46d1b78a03d52306f21f77a4e4a144b6d31486
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/ba5ad7c05994836bcb59fd6d7b5b70c8b553ea56
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Bernard-Zhao/msm-adreno-fix-different-address-spaces-warning/20210331-212535
        git checkout ba5ad7c05994836bcb59fd6d7b5b70c8b553ea56
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c: In function 'cx_debugbus_read':
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:189:2: note: in expansion of macro 'cxdbg_write'
     189 |  cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_A, reg);
         |  ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:190:2: note: in expansion of macro 'cxdbg_write'
     190 |  cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_B, reg);
         |  ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:191:2: note: in expansion of macro 'cxdbg_write'
     191 |  cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_C, reg);
         |  ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:192:2: note: in expansion of macro 'cxdbg_write'
     192 |  cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_D, reg);
         |  ^~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:180:30: error: invalid operands to binary << (have 'void *' and 'int')
     180 |  msm_readl((ptr) + ((offset) << 2))
         |                              ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:197:12: note: in expansion of macro 'cxdbg_read'
     197 |  data[0] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2);
         |            ^~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:180:30: error: invalid operands to binary << (have 'void *' and 'int')
     180 |  msm_readl((ptr) + ((offset) << 2))
         |                              ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:198:12: note: in expansion of macro 'cxdbg_read'
     198 |  data[1] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF1);
         |            ^~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c: In function 'a6xx_get_debugbus':
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:356:3: note: in expansion of macro 'cxdbg_write'
     356 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLT,
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:359:3: note: in expansion of macro 'cxdbg_write'
     359 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLM,
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:362:3: note: in expansion of macro 'cxdbg_write'
     362 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_0, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:363:3: note: in expansion of macro 'cxdbg_write'
     363 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_1, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:364:3: note: in expansion of macro 'cxdbg_write'
     364 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_2, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:365:3: note: in expansion of macro 'cxdbg_write'
     365 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_3, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:367:3: note: in expansion of macro 'cxdbg_write'
     367 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0,
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:369:3: note: in expansion of macro 'cxdbg_write'
     369 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_1,
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:372:3: note: in expansion of macro 'cxdbg_write'
     372 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_0, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:373:3: note: in expansion of macro 'cxdbg_write'
     373 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_1, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:374:3: note: in expansion of macro 'cxdbg_write'
     374 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_2, 0);
         |   ^~~~~~~~~~~
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: error: invalid operands to binary << (have 'void *' and 'int')
     177 |  msm_writel((val), (ptr) + ((offset) << 2))
         |                                      ^~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:375:3: note: in expansion of macro 'cxdbg_write'
     375 |   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_3, 0);
         |   ^~~~~~~~~~~


vim +177 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1707add815519da Jordan Crouse 2018-11-02  175  
1707add815519da Jordan Crouse 2018-11-02  176  #define cxdbg_write(ptr, offset, val) \
1707add815519da Jordan Crouse 2018-11-02 @177  	msm_writel((val), (ptr) + ((offset) << 2))
1707add815519da Jordan Crouse 2018-11-02  178  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
kernel test robot March 31, 2021, 6:12 p.m. UTC | #2 
Hi Bernard,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc5 next-20210331]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Bernard-Zhao/msm-adreno-fix-different-address-spaces-warning/20210331-212535
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 5e46d1b78a03d52306f21f77a4e4a144b6d31486
config: arm64-randconfig-r011-20210330 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 3a6365a439ede4b7c65076bb42b1b7dbf72216b5)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/0day-ci/linux/commit/ba5ad7c05994836bcb59fd6d7b5b70c8b553ea56
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Bernard-Zhao/msm-adreno-fix-different-address-spaces-warning/20210331-212535
        git checkout ba5ad7c05994836bcb59fd6d7b5b70c8b553ea56
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:189:2: error: invalid operands to binary expression ('void *' and 'int')
           cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_A, reg);
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:190:2: error: invalid operands to binary expression ('void *' and 'int')
           cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_B, reg);
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:191:2: error: invalid operands to binary expression ('void *' and 'int')
           cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_C, reg);
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:192:2: error: invalid operands to binary expression ('void *' and 'int')
           cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_D, reg);
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:197:12: error: invalid operands to binary expression ('void *' and 'int')
           data[0] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2);
                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:180:30: note: expanded from macro 'cxdbg_read'
           msm_readl((ptr) + ((offset) << 2))
                              ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:198:12: error: invalid operands to binary expression ('void *' and 'int')
           data[1] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF1);
                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:180:30: note: expanded from macro 'cxdbg_read'
           msm_readl((ptr) + ((offset) << 2))
                              ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:356:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLT,
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:359:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLM,
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:362:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_0, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:363:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_1, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:364:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_2, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:365:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_3, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:367:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0,
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:369:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_1,
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:372:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_0, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:373:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_1, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))
                                      ~~~~~~~~ ^  ~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:374:3: error: invalid operands to binary expression ('void *' and 'int')
                   cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_2, 0);
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:177:38: note: expanded from macro 'cxdbg_write'
           msm_writel((val), (ptr) + ((offset) << 2))


vim +189 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

   175	
   176	#define cxdbg_write(ptr, offset, val) \
   177		msm_writel((val), (ptr) + ((offset) << 2))
   178	
   179	#define cxdbg_read(ptr, offset) \
   180		msm_readl((ptr) + ((offset) << 2))
   181	
   182	/* read a value from the CX debug bus */
   183	static int cx_debugbus_read(void *__iomem cxdbg, u32 block, u32 offset,
   184			u32 *data)
   185	{
   186		u32 reg = A6XX_CX_DBGC_CFG_DBGBUS_SEL_A_PING_INDEX(offset) |
   187			A6XX_CX_DBGC_CFG_DBGBUS_SEL_A_PING_BLK_SEL(block);
   188	
 > 189		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_A, reg);
   190		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_B, reg);
   191		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_C, reg);
   192		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_D, reg);
   193	
   194		/* Wait 1 us to make sure the data is flowing */
   195		udelay(1);
   196	
   197		data[0] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2);
   198		data[1] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF1);
   199	
   200		return 2;
   201	}
   202	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
index c1699b4f9a89..e5558d09ddf9 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
@@ -186,16 +186,16 @@  static int cx_debugbus_read(void *__iomem cxdbg, u32 block, u32 offset,
 	u32 reg = A6XX_CX_DBGC_CFG_DBGBUS_SEL_A_PING_INDEX(offset) |
 		A6XX_CX_DBGC_CFG_DBGBUS_SEL_A_PING_BLK_SEL(block);
 
-	cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_A, reg);
-	cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_B, reg);
-	cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_C, reg);
-	cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_D, reg);
+	cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_A, reg);
+	cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_B, reg);
+	cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_C, reg);
+	cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_SEL_D, reg);
 
 	/* Wait 1 us to make sure the data is flowing */
 	udelay(1);
 
-	data[0] = cxdbg_read(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2);
-	data[1] = cxdbg_read(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF1);
+	data[0] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2);
+	data[1] = cxdbg_read(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF1);
 
 	return 2;
 }
@@ -353,26 +353,26 @@  static void a6xx_get_debugbus(struct msm_gpu *gpu,
 		cxdbg = ioremap(res->start, resource_size(res));
 
 	if (cxdbg) {
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLT,
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLT,
 			A6XX_DBGC_CFG_DBGBUS_CNTLT_SEGT(0xf));
 
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLM,
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLM,
 			A6XX_DBGC_CFG_DBGBUS_CNTLM_ENABLE(0xf));
 
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_0, 0);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_1, 0);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_2, 0);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_3, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_0, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_1, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_2, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_3, 0);
 
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0,
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0,
 			0x76543210);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_1,
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_1,
 			0xFEDCBA98);
 
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_0, 0);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_1, 0);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_2, 0);
-		cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_3, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_0, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_1, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_2, 0);
+		cxdbg_write(cxdbg, (void __iomem *)REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_3, 0);
 	}
 
 	nr_debugbus_blocks = ARRAY_SIZE(a6xx_debugbus_blocks) +