Message ID | 1617694853-6881-12-git-send-email-pmorel@linux.ibm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | s390x: Testing SSCH, CSCH and HSCH for errors | expand |
On Tue, 6 Apr 2021 09:40:48 +0200 Pierre Morel <pmorel@linux.ibm.com> wrote: > Verify that using MIDAW triggers a operand exception. This is only for current QEMU; a future QEMU or another hypervisor may support it. I think in those cases the failure mode may be different (as the ccw does not use midaws?) > > Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> > --- > s390x/css.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/s390x/css.c b/s390x/css.c > index f8f91cf..56adc16 100644 > --- a/s390x/css.c > +++ b/s390x/css.c > @@ -197,6 +197,18 @@ static void ssch_ccw_dma31(void) > free_pages(ccw_high); > } > > +static void ssch_orb_midaw(void) > +{ > + uint32_t tmp = orb->ctrl; > + > + orb->ctrl |= ORB_CTRL_MIDAW; > + expect_pgm_int(); > + ssch(test_device_sid, orb); > + check_pgm_int_code(PGM_INT_CODE_OPERAND); > + > + orb->ctrl = tmp; > +} > + > static struct tests ssh_tests[] = { > { "privilege", ssch_privilege }, > { "orb cpa zero", ssch_orb_cpa_zero }, > @@ -204,6 +216,7 @@ static struct tests ssh_tests[] = { > { "data access", ssch_data_access }, > { "CCW access", ssch_ccw_access }, > { "CCW in DMA31", ssch_ccw_dma31 }, > + { "ORB MIDAW unsupported", ssch_orb_midaw }, > { NULL, NULL } > }; >
On 4/6/21 5:58 PM, Cornelia Huck wrote: > On Tue, 6 Apr 2021 09:40:48 +0200 > Pierre Morel <pmorel@linux.ibm.com> wrote: > >> Verify that using MIDAW triggers a operand exception. > > This is only for current QEMU; a future QEMU or another hypervisor may > support it. I think in those cases the failure mode may be different > (as the ccw does not use midaws?) Yes, should I let fall this test case?
On Wed, 7 Apr 2021 12:06:03 +0200 Pierre Morel <pmorel@linux.ibm.com> wrote: > On 4/6/21 5:58 PM, Cornelia Huck wrote: > > On Tue, 6 Apr 2021 09:40:48 +0200 > > Pierre Morel <pmorel@linux.ibm.com> wrote: > > > >> Verify that using MIDAW triggers a operand exception. > > > > This is only for current QEMU; a future QEMU or another hypervisor may > > support it. I think in those cases the failure mode may be different > > (as the ccw does not use midaws?) > > Yes, should I let fall this test case? I'm not sure how much value it adds, so I'm for dropping it. Any other opinions?
diff --git a/s390x/css.c b/s390x/css.c index f8f91cf..56adc16 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -197,6 +197,18 @@ static void ssch_ccw_dma31(void) free_pages(ccw_high); } +static void ssch_orb_midaw(void) +{ + uint32_t tmp = orb->ctrl; + + orb->ctrl |= ORB_CTRL_MIDAW; + expect_pgm_int(); + ssch(test_device_sid, orb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + + orb->ctrl = tmp; +} + static struct tests ssh_tests[] = { { "privilege", ssch_privilege }, { "orb cpa zero", ssch_orb_cpa_zero }, @@ -204,6 +216,7 @@ static struct tests ssh_tests[] = { { "data access", ssch_data_access }, { "CCW access", ssch_ccw_access }, { "CCW in DMA31", ssch_ccw_dma31 }, + { "ORB MIDAW unsupported", ssch_orb_midaw }, { NULL, NULL } };
Verify that using MIDAW triggers a operand exception. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> --- s390x/css.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)