| Message ID | 20210406155053.29101-1-jbx6244@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1,1/2] dt-bindings: pwm: convert pwm-rockchip.txt to YAML | expand |
Hi, Question for Heiko: rv1108.dtsi and rk3328.dtsi have a undocumented "interrupts" property AFAICT without driver support. Please advise what to do with it. See build log: https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210406155053.29101-1-jbx6244@gmail.com/ ==== Question for Rob: It looks like that recent "improvements" with regard to checking for undocumented compatible strings make it almost impossible to do any useful dt_checking, let alone for the average user. Maybe reduce the notification blurb output a bit for things that have nothing to do with this document. Unable to fall back to previous versions for older kernels. pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade make ARCH=arm dtbs_check make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml make ARCH=arm64 dtbs_check make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml On 4/6/21 5:50 PM, Johan Jonker wrote: > Current dts files with 'pwm' nodes are manually verified. > In order to automate this process pwm-rockchip.txt > has to be converted to yaml. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > .../devicetree/bindings/pwm/pwm-rockchip.txt | 27 --------- > .../devicetree/bindings/pwm/pwm-rockchip.yaml | 66 ++++++++++++++++++++++ > 2 files changed, 66 insertions(+), 27 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt > deleted file mode 100644 > index f70956dea..000000000 > --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt > +++ /dev/null > @@ -1,27 +0,0 @@ > -Rockchip PWM controller > - > -Required properties: > - - compatible: should be "rockchip,<name>-pwm" > - "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs > - "rockchip,rk3288-pwm": found on RK3288 SOC > - "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC > - "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC > - - reg: physical base address and length of the controller's registers > - - clocks: See ../clock/clock-bindings.txt > - - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399): > - - There is one clock that's used both to derive the functional clock > - for the device and as the bus clock. > - - For newer hardware (rk3328 and future socs): specified by name > - - "pwm": This is used to derive the functional clock. > - - "pclk": This is the APB bus clock. > - - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory > - for a description of the cell format. > - > -Example: > - > - pwm0: pwm@20030000 { > - compatible = "rockchip,rk2928-pwm"; > - reg = <0x20030000 0x10>; > - clocks = <&cru PCLK_PWM01>; > - #pwm-cells = <2>; > - }; > diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > new file mode 100644 > index 000000000..cfd637d3e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip PWM controller > + > +maintainers: > + - Heiko Stuebner <heiko@sntech.de> > + > +properties: > + compatible: > + oneOf: > + - const: rockchip,rk2928-pwm > + - const: rockchip,rk3288-pwm > + - const: rockchip,vop-pwm > + - items: > + - enum: > + - rockchip,rv1108-pwm > + - const: rockchip,rk3288-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + description: > + For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399) > + There is one clock that is used both to derive the functional clock > + for the device and as the bus clock. > + For newer hardware (rk3328 and future SoCs) that is also specified > + with clock names. > + "pwm" is used to derive the functional clock for the device. > + "pclk" is used as the APB bus clock. > + > + clock-names: > + minItems: 1 > + items: > + - const: pwm > + - const: pclk > + > + "#pwm-cells": > + enum: [2, 3] > + description: > + Must be 2 (rk2928) or 3 (rk3288). > + See pwm.yaml for a description of the cell format. > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - "#pwm-cells" > + > +examples: > + - | > + #include <dt-bindings/clock/rk3188-cru-common.h> > + pwm0: pwm@20030000 { > + compatible = "rockchip,rk2928-pwm"; > + reg = <0x20030000 0x10>; > + clocks = <&cru PCLK_PWM01>; > + #pwm-cells = <2>; > + }; >
On Tue, Apr 06, 2021 at 05:50:52PM +0200, Johan Jonker wrote: > Current dts files with 'pwm' nodes are manually verified. > In order to automate this process pwm-rockchip.txt > has to be converted to yaml. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > .../devicetree/bindings/pwm/pwm-rockchip.txt | 27 --------- > .../devicetree/bindings/pwm/pwm-rockchip.yaml | 66 ++++++++++++++++++++++ > 2 files changed, 66 insertions(+), 27 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt > deleted file mode 100644 > index f70956dea..000000000 > --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt > +++ /dev/null > @@ -1,27 +0,0 @@ > -Rockchip PWM controller > - > -Required properties: > - - compatible: should be "rockchip,<name>-pwm" > - "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs > - "rockchip,rk3288-pwm": found on RK3288 SOC > - "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC > - "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC > - - reg: physical base address and length of the controller's registers > - - clocks: See ../clock/clock-bindings.txt > - - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399): > - - There is one clock that's used both to derive the functional clock > - for the device and as the bus clock. > - - For newer hardware (rk3328 and future socs): specified by name > - - "pwm": This is used to derive the functional clock. > - - "pclk": This is the APB bus clock. > - - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory > - for a description of the cell format. > - > -Example: > - > - pwm0: pwm@20030000 { > - compatible = "rockchip,rk2928-pwm"; > - reg = <0x20030000 0x10>; > - clocks = <&cru PCLK_PWM01>; > - #pwm-cells = <2>; > - }; > diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > new file mode 100644 > index 000000000..cfd637d3e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip PWM controller > + > +maintainers: > + - Heiko Stuebner <heiko@sntech.de> > + > +properties: > + compatible: > + oneOf: > + - const: rockchip,rk2928-pwm > + - const: rockchip,rk3288-pwm > + - const: rockchip,vop-pwm > + - items: > + - enum: > + - rockchip,rv1108-pwm > + - const: rockchip,rk3288-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + description: > + For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399) > + There is one clock that is used both to derive the functional clock > + for the device and as the bus clock. > + For newer hardware (rk3328 and future SoCs) that is also specified Can you express this with a schema. > + with clock names. > + "pwm" is used to derive the functional clock for the device. > + "pclk" is used as the APB bus clock. Let's not document the names twice. > + > + clock-names: > + minItems: 1 > + items: > + - const: pwm > + - const: pclk > + > + "#pwm-cells": > + enum: [2, 3] > + description: > + Must be 2 (rk2928) or 3 (rk3288). > + See pwm.yaml for a description of the cell format. > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - "#pwm-cells" > + > +examples: > + - | > + #include <dt-bindings/clock/rk3188-cru-common.h> > + pwm0: pwm@20030000 { > + compatible = "rockchip,rk2928-pwm"; > + reg = <0x20030000 0x10>; > + clocks = <&cru PCLK_PWM01>; > + #pwm-cells = <2>; > + }; > -- > 2.11.0 >
On Tue, Apr 06, 2021 at 09:04:29PM +0200, Johan Jonker wrote: > Hi, > > Question for Heiko: > rv1108.dtsi and rk3328.dtsi have a undocumented "interrupts" property > AFAICT without driver support. > Please advise what to do with it. > > > See build log: > https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210406155053.29101-1-jbx6244@gmail.com/ > > ==== > > Question for Rob: > It looks like that recent "improvements" with regard to checking for > undocumented compatible strings make it almost impossible to do any > useful dt_checking, let alone for the average user. Maybe reduce the > notification blurb output a bit for things that have nothing to do with > this document. It's off by default for dt_binding_check until the 80 or so warnings are killed. It's on for the PW checks so new ones don't get added. It's also off for dtbs_check if you set DT_SCHEMA_FILES. > Unable to fall back to previous versions for older kernels. Sorry, don't understand this sentence. > > pip3 install git+https://github.com/devicetree-org/dt-schema.git@master > --upgrade > > make ARCH=arm dtbs_check > make ARCH=arm dtbs_check > DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > > make ARCH=arm64 dtbs_check > make ARCH=arm64 dtbs_check > DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt deleted file mode 100644 index f70956dea..000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt +++ /dev/null @@ -1,27 +0,0 @@ -Rockchip PWM controller - -Required properties: - - compatible: should be "rockchip,<name>-pwm" - "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs - "rockchip,rk3288-pwm": found on RK3288 SOC - "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC - "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC - - reg: physical base address and length of the controller's registers - - clocks: See ../clock/clock-bindings.txt - - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399): - - There is one clock that's used both to derive the functional clock - for the device and as the bus clock. - - For newer hardware (rk3328 and future socs): specified by name - - "pwm": This is used to derive the functional clock. - - "pclk": This is the APB bus clock. - - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory - for a description of the cell format. - -Example: - - pwm0: pwm@20030000 { - compatible = "rockchip,rk2928-pwm"; - reg = <0x20030000 0x10>; - clocks = <&cru PCLK_PWM01>; - #pwm-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml new file mode 100644 index 000000000..cfd637d3e --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip PWM controller + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + oneOf: + - const: rockchip,rk2928-pwm + - const: rockchip,rk3288-pwm + - const: rockchip,vop-pwm + - items: + - enum: + - rockchip,rv1108-pwm + - const: rockchip,rk3288-pwm + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + description: + For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399) + There is one clock that is used both to derive the functional clock + for the device and as the bus clock. + For newer hardware (rk3328 and future SoCs) that is also specified + with clock names. + "pwm" is used to derive the functional clock for the device. + "pclk" is used as the APB bus clock. + + clock-names: + minItems: 1 + items: + - const: pwm + - const: pclk + + "#pwm-cells": + enum: [2, 3] + description: + Must be 2 (rk2928) or 3 (rk3288). + See pwm.yaml for a description of the cell format. + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +examples: + - | + #include <dt-bindings/clock/rk3188-cru-common.h> + pwm0: pwm@20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + clocks = <&cru PCLK_PWM01>; + #pwm-cells = <2>; + };
Current dts files with 'pwm' nodes are manually verified. In order to automate this process pwm-rockchip.txt has to be converted to yaml. Signed-off-by: Johan Jonker <jbx6244@gmail.com> --- .../devicetree/bindings/pwm/pwm-rockchip.txt | 27 --------- .../devicetree/bindings/pwm/pwm-rockchip.yaml | 66 ++++++++++++++++++++++ 2 files changed, 66 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml