| Message ID | 1618406454-7953-4-git-send-email-bpeled@marvell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | Asynchronous linkdown recovery | expand |
On Wed, Apr 14, 2021 at 04:20:52PM +0300, bpeled@marvell.com wrote: > From: Ben Peled <bpeled@marvell.com> > > Adding optional system-controller and mac-reset-bit-mask > needed for linkdown procedure. Same comment as v1. BTW, it's PATCH not "PATCH". Don't do anything and git will do the right thing here. > > Signed-off-by: Ben Peled <bpeled@marvell.com> > --- > Documentation/devicetree/bindings/pci/pci-armada8k.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt > index 7a813d0..2696e79 100644 > --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt > +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt > @@ -24,6 +24,10 @@ Optional properties: > - phy-names: names of the PHYs corresponding to the number of lanes. > Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for > 2 PHYs. > +- marvell,system-controller: address of system controller needed > + in order to reset MAC used by link-down handle > +- marvell,mac-reset-bit-mask: MAC reset bit of system controller > + needed in order to reset MAC used by link-down handle > > Example: > > @@ -45,4 +49,6 @@ Example: > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > num-lanes = <1>; > clocks = <&cpm_syscon0 1 13>; > + marvell,system-controller = <&CP11X_LABEL(syscon0)>; > + marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>; > }; > -- > 2.7.4 >
diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt index 7a813d0..2696e79 100644 --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt @@ -24,6 +24,10 @@ Optional properties: - phy-names: names of the PHYs corresponding to the number of lanes. Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for 2 PHYs. +- marvell,system-controller: address of system controller needed + in order to reset MAC used by link-down handle +- marvell,mac-reset-bit-mask: MAC reset bit of system controller + needed in order to reset MAC used by link-down handle Example: @@ -45,4 +49,6 @@ Example: interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; num-lanes = <1>; clocks = <&cpm_syscon0 1 13>; + marvell,system-controller = <&CP11X_LABEL(syscon0)>; + marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>; };