| Message ID | 20210422095401.2377644-1-gwan-gyeong.mun@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 | expand |
On Thu, 2021-04-22 at 12:54 +0300, Gwan-gyeong Mun wrote: > TGL PSR2 hardware tracking shows momentary flicker and screen shift if > TGL Display stepping is B1 from A0. > It has been fixed from TGL Display stepping C0. > > HSDES: 18015970021 > HSDES: 2209313811 > BSpec: 55378 > > Cc: José Roberto de Souza <jose.souza@intel.com> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 4ad756e238c5..2cc9eeab4baf 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -739,6 +739,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, > return false; > } > > > > > > > > > + /* Wa_2209313811 */ > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) { Missing to check if manual tracking is being used, in this case we can enable PSR2 in those display steppings. > + drm_dbg_kms(&dev_priv->drm, "PSR2 is not supported this Display stepping\n"); > + return false; > + } > + > /* Wa_16011181250 */ > if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv)) { > drm_dbg_kms(&dev_priv->drm, "PSR2 is defeatured for this platform\n");
On Thu, 2021-04-22 at 07:39 -0700, Souza, Jose wrote: > On Thu, 2021-04-22 at 12:54 +0300, Gwan-gyeong Mun wrote: > > TGL PSR2 hardware tracking shows momentary flicker and screen shift > > if > > TGL Display stepping is B1 from A0. > > It has been fixed from TGL Display stepping C0. > > > > HSDES: 18015970021 > > HSDES: 2209313811 > > BSpec: 55378 > > > > Cc: José Roberto de Souza <jose.souza@intel.com> > > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > b/drivers/gpu/drm/i915/display/intel_psr.c > > index 4ad756e238c5..2cc9eeab4baf 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > @@ -739,6 +739,12 @@ static bool intel_psr2_config_valid(struct > > intel_dp *intel_dp, > > return false; > > } > > > > > > > > > > > > > > > > > > + /* Wa_2209313811 */ > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) { > > Missing to check if manual tracking is being used, in this case we > can enable PSR2 in those display steppings. Thanks for reviewing. I'll update it in V2. > > > + drm_dbg_kms(&dev_priv->drm, "PSR2 is not supported > > this Display stepping\n"); > > + return false; > > + } > > + > > /* Wa_16011181250 */ > > if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv)) { > > drm_dbg_kms(&dev_priv->drm, "PSR2 is defeatured for > > this platform\n"); >
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4ad756e238c5..2cc9eeab4baf 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -739,6 +739,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } + /* Wa_2209313811 */ + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) { + drm_dbg_kms(&dev_priv->drm, "PSR2 is not supported this Display stepping\n"); + return false; + } + /* Wa_16011181250 */ if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv)) { drm_dbg_kms(&dev_priv->drm, "PSR2 is defeatured for this platform\n");
TGL PSR2 hardware tracking shows momentary flicker and screen shift if TGL Display stepping is B1 from A0. It has been fixed from TGL Display stepping C0. HSDES: 18015970021 HSDES: 2209313811 BSpec: 55378 Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++ 1 file changed, 6 insertions(+)