| Message ID | 1617091701-6444-3-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | add one regulator used to power up pcie phy | expand |
On Tue, Mar 30, 2021 at 04:08:21PM +0800, Richard Zhu wrote: > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, > the VREG_BYPASS bits of GPR registers should be cleared from default > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be > turned on. Maybe something like this? PCI: imx6: Enable PHY internal regulator when supplied >3V The i.MX8MQ PCIe PHY needs 1.8V but can by supplied by either a 1.8V or a 3.3V regulator. The "vph-supply" DT property tells us which external regulator supplies the PHY. If that regulator supplies anything over 3V, enable the PHY's internal 3.3V-to-1.8V regulator. > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/pci/controller/dwc/pci-imx6.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 853ea8e82952..94b43b4ecca1 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -37,6 +37,7 @@ > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10) > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11) > +#define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12) > #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8) > #define IMX8MQ_PCIE2_BASE_ADDR 0x33c00000 > > @@ -80,6 +81,7 @@ struct imx6_pcie { > u32 tx_swing_full; > u32 tx_swing_low; > struct regulator *vpcie; > + struct regulator *vph; > void __iomem *phy_base; > > /* power domain for pcie */ > @@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) > imx6_pcie_grp_offset(imx6_pcie), > IMX8MQ_GPR_PCIE_REF_USE_PAD, > IMX8MQ_GPR_PCIE_REF_USE_PAD); > + /* > + * Regarding the datasheet, the PCIE_VPH is suggested > + * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the > + * VREG_BYPASS should be cleared to zero. > + */ > + if (imx6_pcie->vph && > + regulator_get_voltage(imx6_pcie->vph) > 3000000) > + regmap_update_bits(imx6_pcie->iomuxc_gpr, > + imx6_pcie_grp_offset(imx6_pcie), > + IMX8MQ_GPR_PCIE_VREG_BYPASS, > + 0); > break; > case IMX7D: > regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, > @@ -1130,6 +1143,13 @@ static int imx6_pcie_probe(struct platform_device *pdev) > imx6_pcie->vpcie = NULL; > } > > + imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph"); > + if (IS_ERR(imx6_pcie->vph)) { > + if (PTR_ERR(imx6_pcie->vph) != -ENODEV) > + return PTR_ERR(imx6_pcie->vph); > + imx6_pcie->vph = NULL; > + } > + > platform_set_drvdata(pdev, imx6_pcie); > > ret = imx6_pcie_attach_pd(dev); > -- > 2.17.1 >
Hi Bjorn: It seems that the email I replied on May07, is missing. Re-send it. Best Regards Richard Zhu > -----Original Message----- > From: Bjorn Helgaas <helgaas@kernel.org> > Sent: Friday, May 7, 2021 5:09 AM > To: Richard Zhu <hongxing.zhu@nxp.com> > Cc: l.stach@pengutronix.de; andrew.smirnov@gmail.com; > shawnguo@kernel.org; kw@linux.com; bhelgaas@google.com; > stefan@agner.ch; lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org; > dl-linux-imx <linux-imx@nxp.com>; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; kernel@pengutronix.de > Subject: [EXT] Re: [RESEND v4 2/2] PCI: imx: clear vreg bypass when pcie vph > voltage is 3v3 > > Caution: EXT Email > > On Tue, Mar 30, 2021 at 04:08:21PM +0800, Richard Zhu wrote: > > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. > > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data > > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, > > the VREG_BYPASS bits of GPR registers should be cleared from default > > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be > > turned on. > > Maybe something like this? > > PCI: imx6: Enable PHY internal regulator when supplied >3V > > The i.MX8MQ PCIe PHY needs 1.8V but can by supplied by either a 1.8V > or a 3.3V regulator. > > The "vph-supply" DT property tells us which external regulator > supplies the PHY. If that regulator supplies anything over 3V, > enable the PHY's internal 3.3V-to-1.8V regulator. > [Richard Zhu] Hi Bjorn: Thanks for your comments. vph is the "high-voltage power supply" of the PHY. How do you think with the following one with some minor updates? PCI: imx6: Enable PHY internal regulator when supplied >3V The i.MX8MQ PCIe PHY needs 1.8V in default but can be supplied by either a 1.8V or a 3.3V regulator. The "vph-supply" DT property tells us which external regulator supplies the PHY. If that regulator supplies anything over 3V, enable the PHY's internal 3.3V-to-1.8V regulator. BR Richard > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > > --- > > drivers/pci/controller/dwc/pci-imx6.c | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c > > b/drivers/pci/controller/dwc/pci-imx6.c > > index 853ea8e82952..94b43b4ecca1 100644 > > --- a/drivers/pci/controller/dwc/pci-imx6.c > > +++ b/drivers/pci/controller/dwc/pci-imx6.c > > @@ -37,6 +37,7 @@ > > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) > > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10) > > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11) > > +#define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12) > > #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8) > > #define IMX8MQ_PCIE2_BASE_ADDR > 0x33c00000 > > > > @@ -80,6 +81,7 @@ struct imx6_pcie { > > u32 tx_swing_full; > > u32 tx_swing_low; > > struct regulator *vpcie; > > + struct regulator *vph; > > void __iomem *phy_base; > > > > /* power domain for pcie */ > > @@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie > *imx6_pcie) > > imx6_pcie_grp_offset(imx6_pcie), > > > IMX8MQ_GPR_PCIE_REF_USE_PAD, > > > IMX8MQ_GPR_PCIE_REF_USE_PAD); > > + /* > > + * Regarding the datasheet, the PCIE_VPH is suggested > > + * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the > > + * VREG_BYPASS should be cleared to zero. > > + */ > > + if (imx6_pcie->vph && > > + regulator_get_voltage(imx6_pcie->vph) > 3000000) > > + regmap_update_bits(imx6_pcie->iomuxc_gpr, > > + > imx6_pcie_grp_offset(imx6_pcie), > > + > IMX8MQ_GPR_PCIE_VREG_BYPASS, > > + 0); > > break; > > case IMX7D: > > regmap_update_bits(imx6_pcie->iomuxc_gpr, > IOMUXC_GPR12, > > @@ -1130,6 +1143,13 @@ static int imx6_pcie_probe(struct > platform_device *pdev) > > imx6_pcie->vpcie = NULL; > > } > > > > + imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, > "vph"); > > + if (IS_ERR(imx6_pcie->vph)) { > > + if (PTR_ERR(imx6_pcie->vph) != -ENODEV) > > + return PTR_ERR(imx6_pcie->vph); > > + imx6_pcie->vph = NULL; > > + } > > + > > platform_set_drvdata(pdev, imx6_pcie); > > > > ret = imx6_pcie_attach_pd(dev); > > -- > > 2.17.1 > >
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 853ea8e82952..94b43b4ecca1 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -37,6 +37,7 @@ #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10) #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11) +#define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12) #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8) #define IMX8MQ_PCIE2_BASE_ADDR 0x33c00000 @@ -80,6 +81,7 @@ struct imx6_pcie { u32 tx_swing_full; u32 tx_swing_low; struct regulator *vpcie; + struct regulator *vph; void __iomem *phy_base; /* power domain for pcie */ @@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) imx6_pcie_grp_offset(imx6_pcie), IMX8MQ_GPR_PCIE_REF_USE_PAD, IMX8MQ_GPR_PCIE_REF_USE_PAD); + /* + * Regarding the datasheet, the PCIE_VPH is suggested + * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the + * VREG_BYPASS should be cleared to zero. + */ + if (imx6_pcie->vph && + regulator_get_voltage(imx6_pcie->vph) > 3000000) + regmap_update_bits(imx6_pcie->iomuxc_gpr, + imx6_pcie_grp_offset(imx6_pcie), + IMX8MQ_GPR_PCIE_VREG_BYPASS, + 0); break; case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1130,6 +1143,13 @@ static int imx6_pcie_probe(struct platform_device *pdev) imx6_pcie->vpcie = NULL; } + imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph"); + if (IS_ERR(imx6_pcie->vph)) { + if (PTR_ERR(imx6_pcie->vph) != -ENODEV) + return PTR_ERR(imx6_pcie->vph); + imx6_pcie->vph = NULL; + } + platform_set_drvdata(pdev, imx6_pcie); ret = imx6_pcie_attach_pd(dev);