| Message ID | 20210510040704.14997-2-peng.fan@oss.nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | soc: imx: add i.MX BLK-CTL support | expand |
On 10.05.21 06:07, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Adding the defines for i.MX8MM BLK-CTL power domains. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > --- > include/dt-bindings/power/imx8mm-power.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h > index fc9c2e16aadc..a10266befa9c 100644 > --- a/include/dt-bindings/power/imx8mm-power.h > +++ b/include/dt-bindings/power/imx8mm-power.h > @@ -19,4 +19,15 @@ > #define IMX8MM_POWER_DOMAIN_DISPMIX 10 > #define IMX8MM_POWER_DOMAIN_MIPI 11 > > +#define IMX8MM_BLK_CTL_PD_VPU_G2 0 > +#define IMX8MM_BLK_CTL_PD_VPU_G1 1 > +#define IMX8MM_BLK_CTL_PD_VPU_H1 2 > +#define IMX8MM_BLK_CTL_PD_VPU_MAX 3 > + > +#define IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE 0 > +#define IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF 1 > +#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI 2 > +#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI 3 > +#define IMX8MM_BLK_CTL_PD_DISPMIX_MAX 4 > + > #endif >
On Mon, 10 May 2021 12:07:01 +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Adding the defines for i.MX8MM BLK-CTL power domains. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > include/dt-bindings/power/imx8mm-power.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h index fc9c2e16aadc..a10266befa9c 100644 --- a/include/dt-bindings/power/imx8mm-power.h +++ b/include/dt-bindings/power/imx8mm-power.h @@ -19,4 +19,15 @@ #define IMX8MM_POWER_DOMAIN_DISPMIX 10 #define IMX8MM_POWER_DOMAIN_MIPI 11 +#define IMX8MM_BLK_CTL_PD_VPU_G2 0 +#define IMX8MM_BLK_CTL_PD_VPU_G1 1 +#define IMX8MM_BLK_CTL_PD_VPU_H1 2 +#define IMX8MM_BLK_CTL_PD_VPU_MAX 3 + +#define IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE 0 +#define IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF 1 +#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI 2 +#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI 3 +#define IMX8MM_BLK_CTL_PD_DISPMIX_MAX 4 + #endif