diff mbox series

[v3,1/7] ARM i.MX6q: remove PHY fixup for KSZ9031

Message ID 20210511043735.30557-2-o.rempel@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series remove different PHY fixups | expand

Commit Message

Oleksij Rempel May 11, 2021, 4:37 a.m. UTC
Starting with:

    bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")

the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
At least with kernel v5.8 configuration provided by this fixup was
overwritten by the micrel driver.

This fixup was providing following configuration:

RX path: 2.58ns delay
    rx -0.42 (left shift) + rx_clk  +0.96ns (right shift) =
        1,38 + 1,2 internal RX delay = 2.58ns
TX path: 0.96ns delay
    tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns

This configuration is outside of the recommended RGMII clock skew delays
and about in the middle of: rgmii-idrx and rgmii-id

Since most embedded systems do not have enough place to introduce
significant clock skew, rgmii-id is the way to go.

In case this patch breaks network functionality on your system, build
kernel with enabled MICREL_PHY. If it is still not working then try
following device tree options:
1. Set (or change) phy-mode in DT to:
   phy-mode = "rgmii-id";
   This actives internal delay for both RX and TX.
1. Set (or change) phy-mode in DT to:
   phy-mode = "rgmii-idrx";
   This actives internal delay for RX only.
3. Use following DT properties:
   phy-mode = "rgmii";
   txen-skew-psec = <0>;
   rxdv-skew-psec = <0>;
   rxd0-skew-psec = <0>;
   rxd1-skew-psec = <0>;
   rxd2-skew-psec = <0>;
   rxd3-skew-psec = <0>;
   rxc-skew-psec = <1860>;
   txc-skew-psec = <1860>;
   This activates the internal delays for RX and TX, with the value as
   the fixup that is removed in this patch.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6q.c | 23 -----------------------
 1 file changed, 23 deletions(-)

Comments

Andrew Lunn May 11, 2021, 12:49 p.m. UTC | #1
On Tue, May 11, 2021 at 06:37:29AM +0200, Oleksij Rempel wrote:
> Starting with:
> 
>     bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
> 
> the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
> At least with kernel v5.8 configuration provided by this fixup was
> overwritten by the micrel driver.
> 
> This fixup was providing following configuration:
> 
> RX path: 2.58ns delay
>     rx -0.42 (left shift) + rx_clk  +0.96ns (right shift) =
>         1,38 + 1,2 internal RX delay = 2.58ns
> TX path: 0.96ns delay
>     tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
> 
> This configuration is outside of the recommended RGMII clock skew delays
> and about in the middle of: rgmii-idrx and rgmii-id
> 
> Since most embedded systems do not have enough place to introduce
> significant clock skew, rgmii-id is the way to go.
> 
> In case this patch breaks network functionality on your system, build
> kernel with enabled MICREL_PHY. If it is still not working then try
> following device tree options:
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-id";
>    This actives internal delay for both RX and TX.
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-idrx";
>    This actives internal delay for RX only.
> 3. Use following DT properties:
>    phy-mode = "rgmii";
>    txen-skew-psec = <0>;
>    rxdv-skew-psec = <0>;
>    rxd0-skew-psec = <0>;
>    rxd1-skew-psec = <0>;
>    rxd2-skew-psec = <0>;
>    rxd3-skew-psec = <0>;
>    rxc-skew-psec = <1860>;
>    txc-skew-psec = <1860>;
>    This activates the internal delays for RX and TX, with the value as
>    the fixup that is removed in this patch.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 703998ebb52e..78205f90da27 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -40,27 +40,6 @@  static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 	return 0;
 }
 
-static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
-{
-	phy_write(dev, 0x0d, device);
-	phy_write(dev, 0x0e, reg);
-	phy_write(dev, 0x0d, (1 << 14) | device);
-	phy_write(dev, 0x0e, val);
-}
-
-static int ksz9031rn_phy_fixup(struct phy_device *dev)
-{
-	/*
-	 * min rx data delay, max rx/tx clock delay,
-	 * min rx/tx control delay
-	 */
-	mmd_write_reg(dev, 2, 4, 0);
-	mmd_write_reg(dev, 2, 5, 0);
-	mmd_write_reg(dev, 2, 8, 0x003ff);
-
-	return 0;
-}
-
 /*
  * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
  * as they are used for slots1-7 PERST#
@@ -152,8 +131,6 @@  static void __init imx6q_enet_phy_init(void)
 	if (IS_BUILTIN(CONFIG_PHYLIB)) {
 		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 				ksz9021rn_phy_fixup);
-		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
-				ksz9031rn_phy_fixup);
 		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,
 				ar8031_phy_fixup);
 		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,