diff mbox series

riscv: Use -mno-relax when using lld linker

Message ID 20210514205643.383422-1-raj.khem@gmail.com (mailing list archive)
State New, archived
Headers show
Series riscv: Use -mno-relax when using lld linker | expand

Commit Message

Khem Raj May 14, 2021, 8:56 p.m. UTC
lld does not implement the RISCV relaxation optimizations like GNU ld
therefore disable it when building with LLVM=1, Also pass it to
assembler when using external GNU assembler ( LLVM_IAS != 1 ), this
ensures that relevant assembler option is also enabled along. if these
options are not used then we see following relocations in objects

0000000000000000 R_RISCV_ALIGN     *ABS*+0x0000000000000002

These are then rejected by lld
ld.lld: error: capability.c:(.fixup+0x0): relocation R_RISCV_ALIGN requires unimplemented linker relaxation; recompile with -mno-relax but the .o is already compiled with -mno-relax

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <ndesaulniers@google.com>
---
 arch/riscv/Makefile | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Nathan Chancellor May 14, 2021, 9:14 p.m. UTC | #1
Hi Khem,

On 5/14/2021 1:56 PM, Khem Raj wrote:
> lld does not implement the RISCV relaxation optimizations like GNU ld
> therefore disable it when building with LLVM=1, Also pass it to
> assembler when using external GNU assembler ( LLVM_IAS != 1 ), this
> ensures that relevant assembler option is also enabled along. if these
> options are not used then we see following relocations in objects
> 
> 0000000000000000 R_RISCV_ALIGN     *ABS*+0x0000000000000002
> 
> These are then rejected by lld
> ld.lld: error: capability.c:(.fixup+0x0): relocation R_RISCV_ALIGN requires unimplemented linker relaxation; recompile with -mno-relax but the .o is already compiled with -mno-relax
> 
> Signed-off-by: Khem Raj <raj.khem@gmail.com>
> Cc: Paul Walmsley <paul.walmsley@sifive.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Albert Ou <aou@eecs.berkeley.edu>
> Cc: Nathan Chancellor <nathan@kernel.org>
> Cc: Nick Desaulniers <ndesaulniers@google.com>

Thank you for the patch! I can build a ARCH=riscv defconfig kernel with 
LLVM=1 now. LLVM_IAS=1 still needs work but we have outstanding issues 
for that:

https://github.com/ClangBuiltLinux/linux/issues/1023
https://github.com/ClangBuiltLinux/linux/issues/1143

Reviewed-by: Nathan Chancellor <nathan@kernel.org>

One comment below though.

> ---
>   arch/riscv/Makefile | 9 +++++++++
>   1 file changed, 9 insertions(+)
> 
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 3eb9590a0775..519f133e0d53 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -38,6 +38,15 @@ else
>   	KBUILD_LDFLAGS += -melf32lriscv
>   endif
>   
> +ifeq ($(LLVM),1)

ifeq ($(CONFIG_LD_IS_LLD),y)

is a better choice so that LD=riscv64-linux-gnu-ld LLVM=1 can still work.

> +	KBUILD_CFLAGS += -mno-relax
> +	KBUILD_AFLAGS += -mno-relax
> +ifneq ($(LLVM_IAS),1)
> +	KBUILD_CFLAGS += -Wa,-mno-relax
> +	KBUILD_AFLAGS += -Wa,-mno-relax
> +endif
> +endif
> +
>   # ISA string setting
>   riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
>   riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
>
Fangrui Song May 14, 2021, 9:14 p.m. UTC | #2
On Fri, May 14, 2021 at 1:57 PM Khem Raj <raj.khem@gmail.com> wrote:
>
> lld does not implement the RISCV relaxation optimizations like GNU ld
> therefore disable it when building with LLVM=1, Also pass it to
> assembler when using external GNU assembler ( LLVM_IAS != 1 ), this
> ensures that relevant assembler option is also enabled along. if these
> options are not used then we see following relocations in objects
>
> 0000000000000000 R_RISCV_ALIGN     *ABS*+0x0000000000000002
>
> These are then rejected by lld
> ld.lld: error: capability.c:(.fixup+0x0): relocation R_RISCV_ALIGN requires unimplemented linker relaxation; recompile with -mno-relax but the .o is already compiled with -mno-relax

This means -mno-relax should emit .option norelax in the assembly.
I'll try fixing this in Clang 13.

> Signed-off-by: Khem Raj <raj.khem@gmail.com>
> Cc: Paul Walmsley <paul.walmsley@sifive.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Albert Ou <aou@eecs.berkeley.edu>
> Cc: Nathan Chancellor <nathan@kernel.org>
> Cc: Nick Desaulniers <ndesaulniers@google.com>
> ---
>  arch/riscv/Makefile | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 3eb9590a0775..519f133e0d53 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -38,6 +38,15 @@ else
>         KBUILD_LDFLAGS += -melf32lriscv
>  endif
>
> +ifeq ($(LLVM),1)
> +       KBUILD_CFLAGS += -mno-relax
> +       KBUILD_AFLAGS += -mno-relax
> +ifneq ($(LLVM_IAS),1)
> +       KBUILD_CFLAGS += -Wa,-mno-relax
> +       KBUILD_AFLAGS += -Wa,-mno-relax
> +endif
> +endif
> +
>  # ISA string setting
>  riscv-march-$(CONFIG_ARCH_RV32I)       := rv32ima
>  riscv-march-$(CONFIG_ARCH_RV64I)       := rv64ima
> --
> 2.31.1
>
> --
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Palmer Dabbelt May 29, 2021, 6:40 p.m. UTC | #3
On Fri, 14 May 2021 13:56:43 PDT (-0700), Khem Raj wrote:
> lld does not implement the RISCV relaxation optimizations like GNU ld
> therefore disable it when building with LLVM=1, Also pass it to
> assembler when using external GNU assembler ( LLVM_IAS != 1 ), this
> ensures that relevant assembler option is also enabled along. if these
> options are not used then we see following relocations in objects
>
> 0000000000000000 R_RISCV_ALIGN     *ABS*+0x0000000000000002
>
> These are then rejected by lld
> ld.lld: error: capability.c:(.fixup+0x0): relocation R_RISCV_ALIGN requires unimplemented linker relaxation; recompile with -mno-relax but the .o is already compiled with -mno-relax
>
> Signed-off-by: Khem Raj <raj.khem@gmail.com>
> Cc: Paul Walmsley <paul.walmsley@sifive.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Albert Ou <aou@eecs.berkeley.edu>
> Cc: Nathan Chancellor <nathan@kernel.org>
> Cc: Nick Desaulniers <ndesaulniers@google.com>
> ---
>  arch/riscv/Makefile | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 3eb9590a0775..519f133e0d53 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -38,6 +38,15 @@ else
>  	KBUILD_LDFLAGS += -melf32lriscv
>  endif
>
> +ifeq ($(LLVM),1)
> +	KBUILD_CFLAGS += -mno-relax
> +	KBUILD_AFLAGS += -mno-relax
> +ifneq ($(LLVM_IAS),1)
> +	KBUILD_CFLAGS += -Wa,-mno-relax
> +	KBUILD_AFLAGS += -Wa,-mno-relax
> +endif
> +endif
> +
>  # ISA string setting
>  riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
>  riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima

Thanks, this is on fixes.
Palmer Dabbelt May 29, 2021, 6:42 p.m. UTC | #4
On Sat, 29 May 2021 11:40:39 PDT (-0700), Palmer Dabbelt wrote:
> On Fri, 14 May 2021 13:56:43 PDT (-0700), Khem Raj wrote:
>> lld does not implement the RISCV relaxation optimizations like GNU ld
>> therefore disable it when building with LLVM=1, Also pass it to
>> assembler when using external GNU assembler ( LLVM_IAS != 1 ), this
>> ensures that relevant assembler option is also enabled along. if these
>> options are not used then we see following relocations in objects
>>
>> 0000000000000000 R_RISCV_ALIGN     *ABS*+0x0000000000000002
>>
>> These are then rejected by lld
>> ld.lld: error: capability.c:(.fixup+0x0): relocation R_RISCV_ALIGN requires unimplemented linker relaxation; recompile with -mno-relax but the .o is already compiled with -mno-relax
>>
>> Signed-off-by: Khem Raj <raj.khem@gmail.com>
>> Cc: Paul Walmsley <paul.walmsley@sifive.com>
>> Cc: Palmer Dabbelt <palmer@dabbelt.com>
>> Cc: Albert Ou <aou@eecs.berkeley.edu>
>> Cc: Nathan Chancellor <nathan@kernel.org>
>> Cc: Nick Desaulniers <ndesaulniers@google.com>
>> ---
>>  arch/riscv/Makefile | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
>> index 3eb9590a0775..519f133e0d53 100644
>> --- a/arch/riscv/Makefile
>> +++ b/arch/riscv/Makefile
>> @@ -38,6 +38,15 @@ else
>>  	KBUILD_LDFLAGS += -melf32lriscv
>>  endif
>>
>> +ifeq ($(LLVM),1)
>> +	KBUILD_CFLAGS += -mno-relax
>> +	KBUILD_AFLAGS += -mno-relax
>> +ifneq ($(LLVM_IAS),1)
>> +	KBUILD_CFLAGS += -Wa,-mno-relax
>> +	KBUILD_AFLAGS += -Wa,-mno-relax
>> +endif
>> +endif
>> +
>>  # ISA string setting
>>  riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
>>  riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
>
> Thanks, this is on fixes.

Sorry, replied to the v1 but I merged the v2.
diff mbox series

Patch

diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 3eb9590a0775..519f133e0d53 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -38,6 +38,15 @@  else
 	KBUILD_LDFLAGS += -melf32lriscv
 endif
 
+ifeq ($(LLVM),1)
+	KBUILD_CFLAGS += -mno-relax
+	KBUILD_AFLAGS += -mno-relax
+ifneq ($(LLVM_IAS),1)
+	KBUILD_CFLAGS += -Wa,-mno-relax
+	KBUILD_AFLAGS += -Wa,-mno-relax
+endif
+endif
+
 # ISA string setting
 riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
 riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima