diff mbox series

[1/5] dt-bindings: media: imx8q: add imx video codec bindings

Message ID dd2c66ba07a8025da2c377c1b6e46f9d7304c9bc.1622429026.git.ming.qian@nxp.com (mailing list archive)
State New, archived
Headers show
Series imx8q video decoder/encoder driver | expand

Commit Message

Ming Qian May 31, 2021, 2:51 a.m. UTC 
Add devicetree binding documentation for IMX8Q Video Processing Unit IP

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
---
 .../bindings/media/nxp,imx8q-vpu.yaml         | 201 ++++++++++++++++++
 1 file changed, 201 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml

Comments

Nicolas Dufresne May 31, 2021, 2:43 p.m. UTC | #1 
Le lundi 31 mai 2021 à 10:51 +0800, Ming Qian a écrit :
> Add devicetree binding documentation for IMX8Q Video Processing Unit IP
> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> ---
>  .../bindings/media/nxp,imx8q-vpu.yaml         | 201 ++++++++++++++++++
>  1 file changed, 201 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> new file mode 100644
> index 000000000000..97e428dbfdbe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> @@ -0,0 +1,201 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/nxp,imx8q-vpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX8Q video encode and decode accelerators
> +
> +maintainers:
> +  - ming_qian <ming.qian@nxp.com>
> +  - Shijie Qin <shijie.qin@nxp.com>
> +
> +description: |-
> +  The Amphion MXC video encode and decode accelerators present on NXP i.MX8Q SoCs.

Hi, thanks for this work. Do you think it would be possible to give a version
for the Amphion design that is in used ? This is for the posterity and/or if
some non-NXP vendor needs to use this driver because it picked the same design.
Though form what I understood, Allegro acquired it, and might not be continuing
that model, it remains that is nicer if we document as much as we can, to give
maximum relevance to you rcontribution.

> +
> +allOf:
> +  - $ref: /schemas/simple-bus.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +        - nxp,imx8qxp-vpu
> +        - nxp,imx8qm-vpu
> +
> +  reg:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  memory-region:
> +    description:
> +      Phandle to a node describing reserved memory used by VPU.
> +      (see bindings/reserved-memory/reserved-memory.txt)
> +
> +  vpu_lpcg:
> +    description:
> +      This is vpu Low-Power Clock Gate (LPCG) module.
> +
> +  mu_m0:
> +    description:
> +      Each vpu core correspond a MU node, which used for communication between
> +      driver and firmware. Implement via mailbox on driver.
> +
> +    vpu_core:
> +      type: object
> +      additionalProperties: false
> +      description:
> +        Each core correspond a decoder or encoder, need to configure them
> +        separately.
> +
> +      properties:
> +        compatible:
> +          oneOf:
> +            - const: nxp,imx8q-vpu-decoder
> +            - const: nxp,imx8q-vpu-encoder
> +
> +        reg:
> +          maxItems: 1
> +
> +        power-domains:
> +          maxItems: 1
> +
> +        mbox-names:
> +            - const: tx0
> +            - const: tx1
> +            - const: rx
> +
> +        mboxes:
> +          maxItems: 3
> +          description:
> +            List of phandle of 2 MU channels for tx, 1 MU channel for rx.
> +
> +        boot-region:
> +          description:
> +            Phandle to a node describing reserved memory used by firmware
> +            loading.
> +
> +        rpc-region:
> +          description:
> +            Phandle to a node describing reserved memory used by RPC shared
> +            memory between firmware and driver.
> +
> +        print-offset:
> +          description:
> +            The memory offset from RPC address, used by reserve firmware log.
> +
> +        id:
> +          description: Index of vpu core.
> +
> +      required:
> +      - compatible
> +      - reg
> +      - power-domains
> +      - mbox-names
> +      - mboxes
> +      - boot-region
> +      - rpc-region
> +      - print-offset
> +      - id
> +
> +
> +required:
> +  - compatible
> +  - reg
> +  - power-domains
> +  - memory-region
> +  - vpu_lpcg
> +  - mu_m0
> +  - vpu_core
> +
> +examples:
> +  # Device node example for i.MX8QM platform:
> +  - |
> +    #include <dt-bindings/firmware/imx/rsrc.h>
> +
> +    vpu: vpu-bus@2c000000 {
> +      compatible = "nxp,imx8qm-vpu", "simple-bus";
> +      ranges = <0x2c000000 0x2c000000 0x2000000>;
> +      reg = <0x2c000000 0x1000000>;
> +      #address-cells = <1>;
> +      #size-cells = <1>;
> +      power-domains = <&pd IMX_SC_R_VPU>;
> +      memory-region = <&vpu_reserved>;
> +
> +      vpu_lpcg: clock-controller@2c000000 {
> +        compatible = "fsl,imx8qxp-lpcg-vpu";
> +        reg = <0x2c000000 0x2000000>;
> +        #clock-cells = <1>;
> +        status = "disabled";
> +      };
> +
> +      mu_m0: mailbox@2d000000 {
> +        compatible = "fsl,imx6sx-mu";
> +        reg = <0x2d000000 0x20000>;
> +        interrupts = <0 472 4>;
> +        #mbox-cells = <2>;
> +        power-domains = <&pd IMX_SC_R_VPU_MU_0>;
> +      };
> +
> +      mu1_m0: mailbox@2d020000 {
> +        compatible = "fsl,imx6sx-mu";
> +        reg = <0x2d020000 0x20000>;
> +        interrupts = <0 473 4>;
> +        #mbox-cells = <2>;
> +        power-domains = <&pd IMX_SC_R_VPU_MU_1>;
> +      };
> +
> +      mu2_m0: mailbox@2d040000 {
> +        compatible = "fsl,imx6sx-mu";
> +        reg = <0x2d040000 0x20000>;
> +        interrupts = <0 474 4>;
> +        #mbox-cells = <2>;
> +        power-domains = <&pd IMX_SC_R_VPU_MU_2>;
> +      };
> +
> +      vpu_core0: vpu_decoder@2d080000 {
> +        compatible = "nxp,imx8q-vpu-decoder";
> +        reg = <0x2d080000 0x10000>;
> +        power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
> +        mbox-names = "tx0", "tx1", "rx";
> +        mboxes = <&mu_m0 0 0
> +                  &mu_m0 0 1
> +                  &mu_m0 1 0>;
> +        boot-region = <&decoder_boot>;
> +        rpc-region = <&decoder_rpc>;
> +        print-offset = <0x180000>;
> +        id = <0>;
> +      };
> +
> +      vpu_core1: vpu_encoder@2d090000 {
> +        compatible = "nxp,imx8q-vpu-encoder";
> +        reg = <0x2d090000 0x10000>;
> +        power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
> +        mbox-names = "tx0", "tx1", "rx";
> +        mboxes = <&mu1_m0 0 0
> +                  &mu1_m0 0 1
> +                  &mu1_m0 1 0>;
> +        boot-region = <&encoder1_boot>;
> +        rpc-region = <&encoder1_rpc>;
> +        print-offset = <0x80000>;
> +        id = <1>;
> +      };
> +
> +      vpu_core2: vpu_encoder@2d0a0000 {
> +        reg = <0x2d0a0000 0x10000>;
> +        compatible = "nxp,imx8q-vpu-encoder";
> +        power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
> +        mbox-names = "tx0", "tx1", "rx";
> +        mboxes = <&mu2_m0 0 0
> +                  &mu2_m0 0 1
> +                  &mu2_m0 1 0>;
> +        boot-region = <&encoder2_boot>;
> +        rpc-region = <&encoder2_rpc>;
> +        id = <2>;
> +      };
> +    };
> +
> +...
Ming Qian June 1, 2021, 1:48 a.m. UTC | #2 
> Le lundi 31 mai 2021 à 10:51 +0800, Ming Qian a écrit :
> > Add devicetree binding documentation for IMX8Q Video Processing Unit
> > IP
> >
> > Signed-off-by: Ming Qian <ming.qian@nxp.com>
> > Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> > Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> > ---
> >  .../bindings/media/nxp,imx8q-vpu.yaml         | 201
> ++++++++++++++++++
> >  1 file changed, 201 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> > b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> > new file mode 100644
> > index 000000000000..97e428dbfdbe
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> > @@ -0,0 +1,201 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +
> > +%YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fschemas%2Fmedia%2Fnxp%2Cimx8q-vpu.yaml%23&amp;data
> =04%7C
> >
> +01%7Cming.qian%40nxp.com%7C8420b2323fb844ffb7ab08d924428216%7
> C686ea1d
> >
> +3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637580690330635265%7CUnk
> nown%7CTW
> >
> +FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJX
> VCI
> >
> +6Mn0%3D%7C1000&amp;sdata=5D8DWb4rqnARSlauGRZ838IHPH2mHJ6wG
> GKG4688gVM%
> > +3D&amp;reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cmin
> g.qian
> >
> +%40nxp.com%7C8420b2323fb844ffb7ab08d924428216%7C686ea1d3bc2b4
> c6fa92cd
> >
> +99c5c301635%7C0%7C0%7C637580690330635265%7CUnknown%7CTWFp
> bGZsb3d8eyJW
> >
> +IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 1000
> >
> +&amp;sdata=E0eIlneiBMKtz2EA%2FgFESzElq2k57nLt7u36J2n51gw%3D&amp
> ;reser
> > +ved=0
> > +
> > +title: NXP i.MX8Q video encode and decode accelerators
> > +
> > +maintainers:
> > +  - ming_qian <ming.qian@nxp.com>
> > +  - Shijie Qin <shijie.qin@nxp.com>
> > +
> > +description: |-
> > +  The Amphion MXC video encode and decode accelerators present on NXP
> i.MX8Q SoCs.
> 
> Hi, thanks for this work. Do you think it would be possible to give a version for
> the Amphion design that is in used ? This is for the posterity and/or if some
> non-NXP vendor needs to use this driver because it picked the same design.
> Though form what I understood, Allegro acquired it, and might not be
> continuing that model, it remains that is nicer if we document as much as we
> can, to give maximum relevance to you rcontribution.

Hi Nicolas,
  We will add the description of the version for the Amphion IP in the V2 patch, thank you for your advice

> 
> > +
> > +allOf:
> > +  - $ref: /schemas/simple-bus.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +        - nxp,imx8qxp-vpu
> > +        - nxp,imx8qm-vpu
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  memory-region:
> > +    description:
> > +      Phandle to a node describing reserved memory used by VPU.
> > +      (see bindings/reserved-memory/reserved-memory.txt)
> > +
> > +  vpu_lpcg:
> > +    description:
> > +      This is vpu Low-Power Clock Gate (LPCG) module.
> > +
> > +  mu_m0:
> > +    description:
> > +      Each vpu core correspond a MU node, which used for
> communication between
> > +      driver and firmware. Implement via mailbox on driver.
> > +
> > +    vpu_core:
> > +      type: object
> > +      additionalProperties: false
> > +      description:
> > +        Each core correspond a decoder or encoder, need to configure
> them
> > +        separately.
> > +
> > +      properties:
> > +        compatible:
> > +          oneOf:
> > +            - const: nxp,imx8q-vpu-decoder
> > +            - const: nxp,imx8q-vpu-encoder
> > +
> > +        reg:
> > +          maxItems: 1
> > +
> > +        power-domains:
> > +          maxItems: 1
> > +
> > +        mbox-names:
> > +            - const: tx0
> > +            - const: tx1
> > +            - const: rx
> > +
> > +        mboxes:
> > +          maxItems: 3
> > +          description:
> > +            List of phandle of 2 MU channels for tx, 1 MU channel for rx.
> > +
> > +        boot-region:
> > +          description:
> > +            Phandle to a node describing reserved memory used by
> firmware
> > +            loading.
> > +
> > +        rpc-region:
> > +          description:
> > +            Phandle to a node describing reserved memory used by RPC
> shared
> > +            memory between firmware and driver.
> > +
> > +        print-offset:
> > +          description:
> > +            The memory offset from RPC address, used by reserve
> firmware log.
> > +
> > +        id:
> > +          description: Index of vpu core.
> > +
> > +      required:
> > +      - compatible
> > +      - reg
> > +      - power-domains
> > +      - mbox-names
> > +      - mboxes
> > +      - boot-region
> > +      - rpc-region
> > +      - print-offset
> > +      - id
> > +
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - power-domains
> > +  - memory-region
> > +  - vpu_lpcg
> > +  - mu_m0
> > +  - vpu_core
> > +
> > +examples:
> > +  # Device node example for i.MX8QM platform:
> > +  - |
> > +    #include <dt-bindings/firmware/imx/rsrc.h>
> > +
> > +    vpu: vpu-bus@2c000000 {
> > +      compatible = "nxp,imx8qm-vpu", "simple-bus";
> > +      ranges = <0x2c000000 0x2c000000 0x2000000>;
> > +      reg = <0x2c000000 0x1000000>;
> > +      #address-cells = <1>;
> > +      #size-cells = <1>;
> > +      power-domains = <&pd IMX_SC_R_VPU>;
> > +      memory-region = <&vpu_reserved>;
> > +
> > +      vpu_lpcg: clock-controller@2c000000 {
> > +        compatible = "fsl,imx8qxp-lpcg-vpu";
> > +        reg = <0x2c000000 0x2000000>;
> > +        #clock-cells = <1>;
> > +        status = "disabled";
> > +      };
> > +
> > +      mu_m0: mailbox@2d000000 {
> > +        compatible = "fsl,imx6sx-mu";
> > +        reg = <0x2d000000 0x20000>;
> > +        interrupts = <0 472 4>;
> > +        #mbox-cells = <2>;
> > +        power-domains = <&pd IMX_SC_R_VPU_MU_0>;
> > +      };
> > +
> > +      mu1_m0: mailbox@2d020000 {
> > +        compatible = "fsl,imx6sx-mu";
> > +        reg = <0x2d020000 0x20000>;
> > +        interrupts = <0 473 4>;
> > +        #mbox-cells = <2>;
> > +        power-domains = <&pd IMX_SC_R_VPU_MU_1>;
> > +      };
> > +
> > +      mu2_m0: mailbox@2d040000 {
> > +        compatible = "fsl,imx6sx-mu";
> > +        reg = <0x2d040000 0x20000>;
> > +        interrupts = <0 474 4>;
> > +        #mbox-cells = <2>;
> > +        power-domains = <&pd IMX_SC_R_VPU_MU_2>;
> > +      };
> > +
> > +      vpu_core0: vpu_decoder@2d080000 {
> > +        compatible = "nxp,imx8q-vpu-decoder";
> > +        reg = <0x2d080000 0x10000>;
> > +        power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
> > +        mbox-names = "tx0", "tx1", "rx";
> > +        mboxes = <&mu_m0 0 0
> > +                  &mu_m0 0 1
> > +                  &mu_m0 1 0>;
> > +        boot-region = <&decoder_boot>;
> > +        rpc-region = <&decoder_rpc>;
> > +        print-offset = <0x180000>;
> > +        id = <0>;
> > +      };
> > +
> > +      vpu_core1: vpu_encoder@2d090000 {
> > +        compatible = "nxp,imx8q-vpu-encoder";
> > +        reg = <0x2d090000 0x10000>;
> > +        power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
> > +        mbox-names = "tx0", "tx1", "rx";
> > +        mboxes = <&mu1_m0 0 0
> > +                  &mu1_m0 0 1
> > +                  &mu1_m0 1 0>;
> > +        boot-region = <&encoder1_boot>;
> > +        rpc-region = <&encoder1_rpc>;
> > +        print-offset = <0x80000>;
> > +        id = <1>;
> > +      };
> > +
> > +      vpu_core2: vpu_encoder@2d0a0000 {
> > +        reg = <0x2d0a0000 0x10000>;
> > +        compatible = "nxp,imx8q-vpu-encoder";
> > +        power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
> > +        mbox-names = "tx0", "tx1", "rx";
> > +        mboxes = <&mu2_m0 0 0
> > +                  &mu2_m0 0 1
> > +                  &mu2_m0 1 0>;
> > +        boot-region = <&encoder2_boot>;
> > +        rpc-region = <&encoder2_rpc>;
> > +        id = <2>;
> > +      };
> > +    };
> > +
> > +...
>
Rob Herring (Arm) June 1, 2021, 1:32 p.m. UTC | #3 
On Mon, 31 May 2021 10:51:09 +0800, Ming Qian wrote:
> Add devicetree binding documentation for IMX8Q Video Processing Unit IP
> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> ---
>  .../bindings/media/nxp,imx8q-vpu.yaml         | 201 ++++++++++++++++++
>  1 file changed, 201 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:24:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:67:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:94:7: [warning] wrong indentation: expected 8 but found 6 (indentation)

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: properties:mu_m0: Additional properties are not allowed ('vpu_core' was unexpected)
	hint: Keywords must be a subset of known json-schema keywords
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: properties:mu_m0: 'vpu_core' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems']
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: 'oneOf' conditional failed, one must be fixed:
	'unevaluatedProperties' is a required property
	'additionalProperties' is a required property
	hint: A schema with a "$ref" to another schema either can define all properties used and use "additionalProperties" or can use "unevaluatedProperties"
	from schema $id: http://devicetree.org/meta-schemas/base.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: ignoring, error in schema: properties: mu_m0
warning: no schema found in file: ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000: failed to match any schema with compatible: ['nxp,imx8qm-vpu', 'simple-bus']
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000/vpu_decoder@2d080000: failed to match any schema with compatible: ['nxp,imx8q-vpu-decoder']
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000/vpu_encoder@2d090000: failed to match any schema with compatible: ['nxp,imx8q-vpu-encoder']
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000/vpu_encoder@2d0a0000: failed to match any schema with compatible: ['nxp,imx8q-vpu-encoder']

See https://patchwork.ozlabs.org/patch/1485530

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.
Ming Qian June 2, 2021, 8:09 a.m. UTC | #4 
> On Mon, 31 May 2021 10:51:09 +0800, Ming Qian wrote:
> > Add devicetree binding documentation for IMX8Q Video Processing Unit
> > IP
> >
> > Signed-off-by: Ming Qian <ming.qian@nxp.com>
> > Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> > Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> > ---
> >  .../bindings/media/nxp,imx8q-vpu.yaml         | 201
> ++++++++++++++++++
> >  1 file changed, 201 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> >
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:24:9:
> [warning] wrong indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:67:13:
> [warning] wrong indentation: expected 10 but found 12 (indentation)
> ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:94:7:
> [warning] wrong indentation: expected 8 but found 6 (indentation)
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: properties:mu_m0: Additional properties are not
> allowed ('vpu_core' was unexpected)
>         hint: Keywords must be a subset of known json-schema keywords
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetr
> ee.org%2Fmeta-schemas%2Fkeywords.yaml%23&amp;data=04%7C01%7Cmin
> g.qian%40nxp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3b
> c2b4c6fa92cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnkno
> wn%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=z5K2eJR%2FKDI7GZbxzI733VSgAI
> R%2FI4sx9Visl21IJe8%3D&amp;reserved=0
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: properties:mu_m0: 'vpu_core' is not one of ['$ref',
> 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains',
> 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum',
> 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum',
> 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern',
> 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize',
> 'unevaluatedProperties', 'uniqueItems']
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetr
> ee.org%2Fmeta-schemas%2Fkeywords.yaml%23&amp;data=04%7C01%7Cmin
> g.qian%40nxp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3b
> c2b4c6fa92cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnkno
> wn%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=z5K2eJR%2FKDI7GZbxzI733VSgAI
> R%2FI4sx9Visl21IJe8%3D&amp;reserved=0
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: 'oneOf' conditional failed, one must be fixed:
>         'unevaluatedProperties' is a required property
>         'additionalProperties' is a required property
>         hint: A schema with a "$ref" to another schema either can define all
> properties used and use "additionalProperties" or can use
> "unevaluatedProperties"
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetr
> ee.org%2Fmeta-schemas%2Fbase.yaml%23&amp;data=04%7C01%7Cming.qia
> n%40nxp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3bc2b4
> c6fa92cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnknown%7
> CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiL
> CJXVCI6Mn0%3D%7C1000&amp;sdata=5XtViMjNpB5Xk6d82g%2FCb54xz2J2jK
> crmhXa5cusqNA%3D&amp;reserved=0
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: ignoring, error in schema: properties: mu_m0
> warning: no schema found in
> file: ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000: failed to match any schema with
> compatible: ['nxp,imx8qm-vpu', 'simple-bus']
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000/vpu_decoder@2d080000: failed to match
> any schema with compatible: ['nxp,imx8q-vpu-decoder']
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000/vpu_encoder@2d090000: failed to match
> any schema with compatible: ['nxp,imx8q-vpu-encoder']
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000/vpu_encoder@2d0a0000: failed to match
> any schema with compatible: ['nxp,imx8q-vpu-encoder']
> 
> See
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
> ork.ozlabs.org%2Fpatch%2F1485530&amp;data=04%7C01%7Cming.qian%40n
> xp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3bc2b4c6fa92
> cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnknown%7CTWF
> pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC
> I6Mn0%3D%7C1000&amp;sdata=UuQ%2Fc7p6ybq5AQPNjxUHRqYCImyKvVeY
> 9UQCfeiE94g%3D&amp;reserved=0
> 
> This check can fail if there are any dependencies. The base for a patch series is
> generally the most recent rc1.
> 
> If you already ran 'make dt_binding_check' and didn't see the above error(s),
> then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit.

Hi Rob,
   I have found the problem, I 'll fix it and re-submit soon
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
new file mode 100644
index 000000000000..97e428dbfdbe
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
@@ -0,0 +1,201 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/nxp,imx8q-vpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8Q video encode and decode accelerators
+
+maintainers:
+  - ming_qian <ming.qian@nxp.com>
+  - Shijie Qin <shijie.qin@nxp.com>
+
+description: |-
+  The Amphion MXC video encode and decode accelerators present on NXP i.MX8Q SoCs.
+
+allOf:
+  - $ref: /schemas/simple-bus.yaml#
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - nxp,imx8qxp-vpu
+        - nxp,imx8qm-vpu
+
+  reg:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  memory-region:
+    description:
+      Phandle to a node describing reserved memory used by VPU.
+      (see bindings/reserved-memory/reserved-memory.txt)
+
+  vpu_lpcg:
+    description:
+      This is vpu Low-Power Clock Gate (LPCG) module.
+
+  mu_m0:
+    description:
+      Each vpu core correspond a MU node, which used for communication between
+      driver and firmware. Implement via mailbox on driver.
+
+    vpu_core:
+      type: object
+      additionalProperties: false
+      description:
+        Each core correspond a decoder or encoder, need to configure them
+        separately.
+
+      properties:
+        compatible:
+          oneOf:
+            - const: nxp,imx8q-vpu-decoder
+            - const: nxp,imx8q-vpu-encoder
+
+        reg:
+          maxItems: 1
+
+        power-domains:
+          maxItems: 1
+
+        mbox-names:
+            - const: tx0
+            - const: tx1
+            - const: rx
+
+        mboxes:
+          maxItems: 3
+          description:
+            List of phandle of 2 MU channels for tx, 1 MU channel for rx.
+
+        boot-region:
+          description:
+            Phandle to a node describing reserved memory used by firmware
+            loading.
+
+        rpc-region:
+          description:
+            Phandle to a node describing reserved memory used by RPC shared
+            memory between firmware and driver.
+
+        print-offset:
+          description:
+            The memory offset from RPC address, used by reserve firmware log.
+
+        id:
+          description: Index of vpu core.
+
+      required:
+      - compatible
+      - reg
+      - power-domains
+      - mbox-names
+      - mboxes
+      - boot-region
+      - rpc-region
+      - print-offset
+      - id
+
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - memory-region
+  - vpu_lpcg
+  - mu_m0
+  - vpu_core
+
+examples:
+  # Device node example for i.MX8QM platform:
+  - |
+    #include <dt-bindings/firmware/imx/rsrc.h>
+
+    vpu: vpu-bus@2c000000 {
+      compatible = "nxp,imx8qm-vpu", "simple-bus";
+      ranges = <0x2c000000 0x2c000000 0x2000000>;
+      reg = <0x2c000000 0x1000000>;
+      #address-cells = <1>;
+      #size-cells = <1>;
+      power-domains = <&pd IMX_SC_R_VPU>;
+      memory-region = <&vpu_reserved>;
+
+      vpu_lpcg: clock-controller@2c000000 {
+        compatible = "fsl,imx8qxp-lpcg-vpu";
+        reg = <0x2c000000 0x2000000>;
+        #clock-cells = <1>;
+        status = "disabled";
+      };
+
+      mu_m0: mailbox@2d000000 {
+        compatible = "fsl,imx6sx-mu";
+        reg = <0x2d000000 0x20000>;
+        interrupts = <0 472 4>;
+        #mbox-cells = <2>;
+        power-domains = <&pd IMX_SC_R_VPU_MU_0>;
+      };
+
+      mu1_m0: mailbox@2d020000 {
+        compatible = "fsl,imx6sx-mu";
+        reg = <0x2d020000 0x20000>;
+        interrupts = <0 473 4>;
+        #mbox-cells = <2>;
+        power-domains = <&pd IMX_SC_R_VPU_MU_1>;
+      };
+
+      mu2_m0: mailbox@2d040000 {
+        compatible = "fsl,imx6sx-mu";
+        reg = <0x2d040000 0x20000>;
+        interrupts = <0 474 4>;
+        #mbox-cells = <2>;
+        power-domains = <&pd IMX_SC_R_VPU_MU_2>;
+      };
+
+      vpu_core0: vpu_decoder@2d080000 {
+        compatible = "nxp,imx8q-vpu-decoder";
+        reg = <0x2d080000 0x10000>;
+        power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
+        mbox-names = "tx0", "tx1", "rx";
+        mboxes = <&mu_m0 0 0
+                  &mu_m0 0 1
+                  &mu_m0 1 0>;
+        boot-region = <&decoder_boot>;
+        rpc-region = <&decoder_rpc>;
+        print-offset = <0x180000>;
+        id = <0>;
+      };
+
+      vpu_core1: vpu_encoder@2d090000 {
+        compatible = "nxp,imx8q-vpu-encoder";
+        reg = <0x2d090000 0x10000>;
+        power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
+        mbox-names = "tx0", "tx1", "rx";
+        mboxes = <&mu1_m0 0 0
+                  &mu1_m0 0 1
+                  &mu1_m0 1 0>;
+        boot-region = <&encoder1_boot>;
+        rpc-region = <&encoder1_rpc>;
+        print-offset = <0x80000>;
+        id = <1>;
+      };
+
+      vpu_core2: vpu_encoder@2d0a0000 {
+        reg = <0x2d0a0000 0x10000>;
+        compatible = "nxp,imx8q-vpu-encoder";
+        power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
+        mbox-names = "tx0", "tx1", "rx";
+        mboxes = <&mu2_m0 0 0
+                  &mu2_m0 0 1
+                  &mu2_m0 1 0>;
+        boot-region = <&encoder2_boot>;
+        rpc-region = <&encoder2_rpc>;
+        id = <2>;
+      };
+    };
+
+...