[2/3,v4] crypto: ixp4xx: Add DT bindings

Commit Message

Linus Walleij May 25, 2021, 8:48 a.m. UTC

This adds device tree bindings for the ixp4xx crypto engine.

Cc: Corentin Labbe <[e-mail]>
Cc: [e-mail]
Signed-off-by: Linus Walleij <[e-mail]>
---
ChangeLog v3->v4:
- Revert back to the phandle to the NPE with the instance
  in the cell as in v1. Use intel,npe-handle just like
  the ethernet driver does.
- Drop the other changes related to using an u32 or reg
  and revert back to v1.
- Keep the other useful stuff from v2 and v3.
ChangeLog v2->v3:
- Use the reg property to set the NPE instance number for
  the crypto engine.
- Add address-cells and size-cells to the NPE bindings
  consequently.
- Use a patternProperty to match the cryto engine child
  "crypto@N".
- Define as crypto@2 in the example.
- Describe the usage of the queue instance cell for the
  queue manager phandles.
ChangeLog v1->v2:
- Drop the phandle to self, just add an NPE instance number
  instead.
- Add the crypto node to the NPE binding.
- Move the example over to the NPE binding where it appears
  in context.
---
 .../bindings/crypto/intel,ixp4xx-crypto.yaml  | 47 +++++++++++++++++++
 ...ntel,ixp4xx-network-processing-engine.yaml | 22 +++++++--
 2 files changed, 65 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml

Comments

Rob Herring (Arm) June 2, 2021, 6:52 p.m. UTC | #1

On Tue, 25 May 2021 10:48:46 +0200, Linus Walleij wrote:
> This adds device tree bindings for the ixp4xx crypto engine.
> 
> Cc: Corentin Labbe <[e-mail]>
> Cc: [e-mail]
> Signed-off-by: Linus Walleij <[e-mail]>
> ---
> ChangeLog v3->v4:
> - Revert back to the phandle to the NPE with the instance
>   in the cell as in v1. Use intel,npe-handle just like
>   the ethernet driver does.
> - Drop the other changes related to using an u32 or reg
>   and revert back to v1.
> - Keep the other useful stuff from v2 and v3.
> ChangeLog v2->v3:
> - Use the reg property to set the NPE instance number for
>   the crypto engine.
> - Add address-cells and size-cells to the NPE bindings
>   consequently.
> - Use a patternProperty to match the cryto engine child
>   "crypto@N".
> - Define as crypto@2 in the example.
> - Describe the usage of the queue instance cell for the
>   queue manager phandles.
> ChangeLog v1->v2:
> - Drop the phandle to self, just add an NPE instance number
>   instead.
> - Add the crypto node to the NPE binding.
> - Move the example over to the NPE binding where it appears
>   in context.
> ---
>  .../bindings/crypto/intel,ixp4xx-crypto.yaml  | 47 +++++++++++++++++++
>  ...ntel,ixp4xx-network-processing-engine.yaml | 22 +++++++--
>  2 files changed, 65 insertions(+), 4 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
> 

Reviewed-by: Rob Herring <[e-mail]>

Patch

diff --git a/Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml b/Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
new file mode 100644
index 000000000000..9c53c27bd20a
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
@@ -0,0 +1,47 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2018 Linaro Ltd.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel IXP4xx cryptographic engine
+
+maintainers:
+  - Linus Walleij <[e-mail]>
+
+description: |
+  The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE
+  (Network Processing Engine). Since it is not a device on its own
+  it is defined as a subnode of the NPE, if crypto support is
+  available on the platform.
+
+properties:
+  compatible:
+    const: intel,ixp4xx-crypto
+
+  intel,npe-handle:
+    $ref: '/schemas/types.yaml#/definitions/phandle-array'
+    maxItems: 1
+    description: phandle to the NPE this crypto engine is using, the cell
+      describing the NPE instance to be used.
+
+  queue-rx:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+    description: phandle to the RX queue on the NPE, the cell describing
+      the queue instance to be used.
+
+  queue-txready:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+    description: phandle to the TX READY queue on the NPE, the cell describing
+      the queue instance to be used.
+
+required:
+  - compatible
+  - intel,npe-handle
+  - queue-rx
+  - queue-txready
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
index 1bd2870c3a9c..c435c9f369a4 100644
--- a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
+++ b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
@@ -26,9 +26,16 @@  properties:
 
   reg:
     items:
-      - description: NPE0 register range
-      - description: NPE1 register range
-      - description: NPE2 register range
+      - description: NPE0 (NPE-A) register range
+      - description: NPE1 (NPE-B) register range
+      - description: NPE2 (NPE-C) register range
+
+  crypto:
+    $ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
+    type: object
+    description: Optional node for the embedded crypto engine, the node
+      should be named with the instance number of the NPE engine used for
+      the crypto engine.
 
 required:
   - compatible
@@ -38,8 +45,15 @@  additionalProperties: false
 
 examples:
   - |
-    npe@c8006000 {
+    npe: npe@c8006000 {
          compatible = "intel,ixp4xx-network-processing-engine";
          reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
+
+         crypto {
+             compatible = "intel,ixp4xx-crypto";
+             intel,npe-handle = <&npe 2>;
+             queue-rx = <&qmgr 30>;
+             queue-txready = <&qmgr 29>;
+         };
     };
 ...