[v2,00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support

Message ID	20210603221758.10305-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
Headers	show Return-Path: <linux-clk-owner@kernel.org> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> To: Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jirislaby@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org Cc: Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH v2 00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support Date: Thu, 3 Jun 2021 23:17:46 +0100 Message-Id: <20210603221758.10305-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk
Series	Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support \| expand [v2,00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support [v2,01/12] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC [v2,02/12] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants [v2,03/12] dt-bindings: arm: renesas: Document SMARC EVK [v2,04/12] soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's [v2,05/12] arm64: defconfig: Enable ARCH_R9A07G044 [v2,06/12] clk: renesas: Define RZ/G2L CPG Clock Definitions [v2,07/12] dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver [v2,08/12] clk: renesas: Add CPG core wrapper for RZ/G2L SoC [v2,09/12] clk: renesas: Add support for R9A07G044 SoC [v2,10/12] serial: sh-sci: Add support for RZ/G2L SoC [v2,11/12] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's [v2,12/12] arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK

Message ID

20210603221758.10305-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)

Headers

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
        Magnus Damm <magnus.damm@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jiri Slaby <jirislaby@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org
Cc: Prabhakar <prabhakar.csengg@gmail.com>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v2 00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC
 EVK support
Date: Thu,  3 Jun 2021 23:17:46 +0100
Message-Id: <20210603221758.10305-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Precedence: bulk

Series

Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support | expand

Message

Prabhakar June 3, 2021, 10:17 p.m. UTC

Hi All,

This patch series adds initial support for Renesas RZ/G2L SoC and
Renesas RZ/G2L SMARC EVK.

Initial patches enables minimal peripherals on Renesas RZ/G2L
SMARC EVK and booted via initramfs.
* Documentation for RZ/G2{L,LC,UL} SoC variants
* SoC identification support
* CPG core support
* Minimal SoC DTSi
* Minimal DTS for SMARC EVK

Changes for v2:
* Included type-2 RZ/G2Ul SoC in binding doc
* Added single entry for SMARC EVK "renesas,smarc-evk"
* Renamed ARCH_R9A07G044L to ARCH_R9A07G044 and
  dropped ARCH_R9A07G044LC config
* Dropped SoC identification changes will post them as
  separate patch.
* Updated comment in sh-sci.c
* Binding documentation patch for serial driver has been
  accepted so dropped the patch from this series
* Incorporated changes requested by Geert for CPG core
* Fixed dtbs_check errors
* Dropped 'clock-names'/'clocks'/'power-domains'/'resets'
  properties from GIC node and will include them in a separate
  patch along with arm,gic-v3.yaml binding updates
* Included ACK's from Rob

Patches are based on top of [1] master branch.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/

Cheers,
Prabhakar

Biju Das (1):
  serial: sh-sci: Add support for RZ/G2L SoC

Lad Prabhakar (11):
  dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC
  dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants
  dt-bindings: arm: renesas: Document SMARC EVK
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  arm64: defconfig: Enable ARCH_R9A07G044
  clk: renesas: Define RZ/G2L CPG Clock Definitions
  dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver
  clk: renesas: Add CPG core wrapper for RZ/G2L SoC
  clk: renesas: Add support for R9A07G044 SoC
  arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's
  arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK

 .../devicetree/bindings/arm/renesas.yaml      |  18 +
 .../bindings/clock/renesas,rzg2l-cpg.yaml     |  80 ++
 arch/arm64/boot/dts/renesas/Makefile          |   2 +
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    | 119 +++
 arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi  |  25 +
 .../boot/dts/renesas/r9a07g044l2-smarc.dts    |  21 +
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi  |  27 +
 arch/arm64/configs/defconfig                  |   1 +
 drivers/clk/renesas/Kconfig                   |   9 +
 drivers/clk/renesas/Makefile                  |   2 +
 drivers/clk/renesas/r9a07g044-cpg.c           | 372 +++++++
 drivers/clk/renesas/renesas-rzg2l-cpg.c       | 979 ++++++++++++++++++
 drivers/clk/renesas/renesas-rzg2l-cpg.h       | 217 ++++
 drivers/soc/renesas/Kconfig                   |   5 +
 drivers/tty/serial/sh-sci.c                   |  12 +-
 drivers/tty/serial/sh-sci.h                   |   1 +
 include/dt-bindings/clock/r9a07g044-cpg.h     |  89 ++
 17 files changed, 1978 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044.dtsi
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
 create mode 100644 drivers/clk/renesas/r9a07g044-cpg.c
 create mode 100644 drivers/clk/renesas/renesas-rzg2l-cpg.c
 create mode 100644 drivers/clk/renesas/renesas-rzg2l-cpg.h
 create mode 100644 include/dt-bindings/clock/r9a07g044-cpg.h

Comments

Lad, Prabhakar June 7, 2021, 11 a.m. UTC | #1

Hi Geert,

On Thu, Jun 3, 2021 at 11:18 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
>
> Hi All,
>
> This patch series adds initial support for Renesas RZ/G2L SoC and
> Renesas RZ/G2L SMARC EVK.
>
> Initial patches enables minimal peripherals on Renesas RZ/G2L
> SMARC EVK and booted via initramfs.
> * Documentation for RZ/G2{L,LC,UL} SoC variants
> * SoC identification support
> * CPG core support
> * Minimal SoC DTSi
> * Minimal DTS for SMARC EVK
>
> Changes for v2:
> * Included type-2 RZ/G2Ul SoC in binding doc
> * Added single entry for SMARC EVK "renesas,smarc-evk"
> * Renamed ARCH_R9A07G044L to ARCH_R9A07G044 and
>   dropped ARCH_R9A07G044LC config
> * Dropped SoC identification changes will post them as
>   separate patch.
> * Updated comment in sh-sci.c
> * Binding documentation patch for serial driver has been
>   accepted so dropped the patch from this series
> * Incorporated changes requested by Geert for CPG core
> * Fixed dtbs_check errors
> * Dropped 'clock-names'/'clocks'/'power-domains'/'resets'
>   properties from GIC node and will include them in a separate
>   patch along with arm,gic-v3.yaml binding updates
> * Included ACK's from Rob
>
> Patches are based on top of [1] master branch.
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/
>
> Cheers,
> Prabhakar
>
> Biju Das (1):
>   serial: sh-sci: Add support for RZ/G2L SoC
>
> Lad Prabhakar (11):
>   dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC
>   dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants
>   dt-bindings: arm: renesas: Document SMARC EVK
>   soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
>   arm64: defconfig: Enable ARCH_R9A07G044
>   clk: renesas: Define RZ/G2L CPG Clock Definitions
>   dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver
>   clk: renesas: Add CPG core wrapper for RZ/G2L SoC
>   clk: renesas: Add support for R9A07G044 SoC
>   arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's
>   arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK
>
Biju pointed out USB/ADC isn't working with the current implementation
on upstream kernel, I'll have to re-structure to accommodate this
use-case. I'll send a v3 fixing the issue.

Sorry for the inconvenience.

Cheers,
Prabhakar

>  .../devicetree/bindings/arm/renesas.yaml      |  18 +
>  .../bindings/clock/renesas,rzg2l-cpg.yaml     |  80 ++
>  arch/arm64/boot/dts/renesas/Makefile          |   2 +
>  arch/arm64/boot/dts/renesas/r9a07g044.dtsi    | 119 +++
>  arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi  |  25 +
>  .../boot/dts/renesas/r9a07g044l2-smarc.dts    |  21 +
>  arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi  |  27 +
>  arch/arm64/configs/defconfig                  |   1 +
>  drivers/clk/renesas/Kconfig                   |   9 +
>  drivers/clk/renesas/Makefile                  |   2 +
>  drivers/clk/renesas/r9a07g044-cpg.c           | 372 +++++++
>  drivers/clk/renesas/renesas-rzg2l-cpg.c       | 979 ++++++++++++++++++
>  drivers/clk/renesas/renesas-rzg2l-cpg.h       | 217 ++++
>  drivers/soc/renesas/Kconfig                   |   5 +
>  drivers/tty/serial/sh-sci.c                   |  12 +-
>  drivers/tty/serial/sh-sci.h                   |   1 +
>  include/dt-bindings/clock/r9a07g044-cpg.h     |  89 ++
>  17 files changed, 1978 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml
>  create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044.dtsi
>  create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi
>  create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
>  create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
>  create mode 100644 drivers/clk/renesas/r9a07g044-cpg.c
>  create mode 100644 drivers/clk/renesas/renesas-rzg2l-cpg.c
>  create mode 100644 drivers/clk/renesas/renesas-rzg2l-cpg.h
>  create mode 100644 include/dt-bindings/clock/r9a07g044-cpg.h
>
> --
> 2.17.1
>