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[v4,0/5] AM64: EVM/SK: Enable PCIe and USB

Message ID 20210603142251.14563-1-kishon@ti.com (mailing list archive)
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Series AM64: EVM/SK: Enable PCIe and USB | expand

Message

Kishon Vijay Abraham I June 3, 2021, 2:22 p.m. UTC
AM642 EVM has one PCIe slot (no USB slot) and AM642 SK has one USB slot
(no PCIe slot).
AM64 SoC has one SERDES module which can be used by either PCIe or USB.

Add DT nodes to represent and enable SERDES/PCIe/USB modules in EVM/SK.

Changes from v3:
1) Limit the lines to < 100

Changes from v2:
1) Dropped "dt-bindings: mux: Convert reg-mux DT bindings to YAML" as
it's handled by a different series from Rob
2) Rename "mux" DT node to a standard "mux-controller" DT node.

Changes from v1:
1) Add a patch to convert reg-mux DT bindings to YAML
2) Use generic names for clock node names
3) Remove redundant status = "okay" for serdes_wiz0

v1: http://lore.kernel.org/r/20210512150107.26793-1-kishon@ti.com
v2: http://lore.kernel.org/r/20210517061739.5762-1-kishon@ti.com
v3: http://lore.kernel.org/r/20210526142921.12127-1-kishon@ti.com

Kishon Vijay Abraham I (5):
  arm64: dts: ti: k3-am64-main: Add SERDES DT node
  arm64: dts: ti: k3-am64-main: Add PCIe DT node
  arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES
  arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port
  arm64: dts: ti: k3-am642-sk: Disable PCIe

 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 107 +++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  |  30 +++++++
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   |  43 +++++++++
 3 files changed, 180 insertions(+)

Comments

Aswath Govindraju June 7, 2021, 2:28 p.m. UTC | #1
On 03/06/21 7:52 pm, Kishon Vijay Abraham I wrote:
> AM642 EVM has one PCIe slot (no USB slot) and AM642 SK has one USB slot
> (no PCIe slot).
> AM64 SoC has one SERDES module which can be used by either PCIe or USB.
> 
> Add DT nodes to represent and enable SERDES/PCIe/USB modules in EVM/SK.
> 
> Changes from v3:
> 1) Limit the lines to < 100
> 
> Changes from v2:
> 1) Dropped "dt-bindings: mux: Convert reg-mux DT bindings to YAML" as
> it's handled by a different series from Rob
> 2) Rename "mux" DT node to a standard "mux-controller" DT node.
> 
> Changes from v1:
> 1) Add a patch to convert reg-mux DT bindings to YAML
> 2) Use generic names for clock node names
> 3) Remove redundant status = "okay" for serdes_wiz0
> 
> v1: http://lore.kernel.org/r/20210512150107.26793-1-kishon@ti.com
> v2: http://lore.kernel.org/r/20210517061739.5762-1-kishon@ti.com
> v3: http://lore.kernel.org/r/20210526142921.12127-1-kishon@ti.com
> 

For the whole series,

Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>

Thanks,
Aswath

> Kishon Vijay Abraham I (5):
>   arm64: dts: ti: k3-am64-main: Add SERDES DT node
>   arm64: dts: ti: k3-am64-main: Add PCIe DT node
>   arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES
>   arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port
>   arm64: dts: ti: k3-am642-sk: Disable PCIe
> 
>  arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 107 +++++++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-am642-evm.dts  |  30 +++++++
>  arch/arm64/boot/dts/ti/k3-am642-sk.dts   |  43 +++++++++
>  3 files changed, 180 insertions(+)
>
Nishanth Menon June 8, 2021, 2:38 p.m. UTC | #2
On Thu, 3 Jun 2021 19:52:46 +0530, Kishon Vijay Abraham I wrote:
> AM642 EVM has one PCIe slot (no USB slot) and AM642 SK has one USB slot
> (no PCIe slot).
> AM64 SoC has one SERDES module which can be used by either PCIe or USB.
> 
> Add DT nodes to represent and enable SERDES/PCIe/USB modules in EVM/SK.
> 
> Changes from v3:
> 1) Limit the lines to < 100
> 
> [...]

Hi Kishon Vijay Abraham I,

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/5] arm64: dts: ti: k3-am64-main: Add SERDES DT node
      commit: 68fefbfed8ba67957b4ab18be4dfb8051b625321
[2/5] arm64: dts: ti: k3-am64-main: Add PCIe DT node
      commit: 4a868bffd876086d9017753a2d5c88a118fe6d5a
[3/5] arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES
      commit: 354065bed2d15f6ff7796c8105133ccdf3a84917
[4/5] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port
      commit: 4e8aa4e3559a7f71e333b0fb8661f302aec64c5c
[5/5] arm64: dts: ti: k3-am642-sk: Disable PCIe
      commit: c90ec93d94f2bddf3873f2dfbc7b4859e09c01ef


Note: we do have this consistent definition unit address conflict in
PCIe subnode on multiple SoCs, which though logical, as we discussed
in [2], is something to look at as needed.
/bus@f4000/pcie@f102000: duplicate unit-address (also used in node
/bus@f4000/pcie-ep@f102000)

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git
[2] https://lore.kernel.org/linux-arm-kernel/ab908779-804f-75c3-d9cc-98a3a558e686@ti.com/