[0/6] dma-buf: Add an API for exporting sync files (v12)

Message

Jason Ekstrand June 10, 2021, 9:09 p.m. UTC

Modern userspace APIs like Vulkan are built on an explicit
synchronization model.  This doesn't always play nicely with the
implicit synchronization used in the kernel and assumed by X11 and
Wayland.  The client -> compositor half of the synchronization isn't too
bad, at least on intel, because we can control whether or not i915
synchronizes on the buffer and whether or not it's considered written.

The harder part is the compositor -> client synchronization when we get
the buffer back from the compositor.  We're required to be able to
provide the client with a VkSemaphore and VkFence representing the point
in time where the window system (compositor and/or display) finished
using the buffer.  With current APIs, it's very hard to do this in such
a way that we don't get confused by the Vulkan driver's access of the
buffer.  In particular, once we tell the kernel that we're rendering to
the buffer again, any CPU waits on the buffer or GPU dependencies will
wait on some of the client rendering and not just the compositor.

This new IOCTL solves this problem by allowing us to get a snapshot of
the implicit synchronization state of a given dma-buf in the form of a
sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
instead of CPU waiting directly, it encapsulates the wait operation, at
the current moment in time, in a sync_file so we can check/wait on it
later.  As long as the Vulkan driver does the sync_file export from the
dma-buf before we re-introduce it for rendering, it will only contain
fences from the compositor or display.  This allows to accurately turn
it into a VkFence or VkSemaphore without any over- synchronization.

This patch series actually contains two new ioctls.  There is the export
one mentioned above as well as an RFC for an import ioctl which provides
the other half.  The intention is to land the export ioctl since it seems
like there's no real disagreement on that one.  The import ioctl, however,
has a lot of debate around it so it's intended to be RFC-only for now.

Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037
IGT tests: https://patchwork.freedesktop.org/series/90490/

v10 (Jason Ekstrand, Daniel Vetter):
 - Add reviews/acks
 - Add a patch to rename _rcu to _unlocked
 - Split things better so import is clearly RFC status

v11 (Daniel Vetter):
 - Add more CCs to try and get maintainers
 - Add a patch to document DMA_BUF_IOCTL_SYNC
 - Generally better docs
 - Use separate structs for import/export (easier to document)
 - Fix an issue in the import patch

v12 (Daniel Vetter):
 - Better docs for DMA_BUF_IOCTL_SYNC

v12 (Christian König):
 - Drop the rename patch in favor of Christian's series
 - Add a comment to the commit message for the dma-buf sync_file export
   ioctl saying why we made it an ioctl on dma-buf

Cc: Christian König <[e-mail]>
Cc: Michel Dänzer <[e-mail]>
Cc: Dave Airlie <[e-mail]>
Cc: Bas Nieuwenhuizen <[e-mail]>
Cc: Daniel Stone <[e-mail]>
Cc: [e-mail]
Cc: [e-mail]
Test-with: [e-mail]

Christian König (1):
  dma-buf: Add dma_fence_array_for_each (v2)

Jason Ekstrand (5):
  dma-buf: Add dma_resv_get_singleton (v6)
  dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
  dma-buf: Add an API for exporting sync files (v12)
  RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
  RFC: dma-buf: Add an API for importing sync files (v7)

 Documentation/driver-api/dma-buf.rst |   8 ++
 drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
 drivers/dma-buf/dma-fence-array.c    |  27 +++++++
 drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
 include/linux/dma-fence-array.h      |  17 +++++
 include/linux/dma-resv.h             |   2 +
 include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
 7 files changed, 369 insertions(+), 1 deletion(-)

Comments

Christian König June 15, 2021, 8:41 a.m. UTC | #1

Hi Jason & Daniel,

maybe I should explain once more where the problem with this approach is 
and why I think we need to get that fixed before we can do something 
like this here.

To summarize what this patch here does is that it copies the exclusive 
fence and/or the shared fences into a sync_file. This alone is totally 
unproblematic.

The problem is what this implies. When you need to copy the exclusive 
fence to a sync_file then this means that the driver is at some point 
ignoring the exclusive fence on a buffer object.

When you combine that with complex drivers which use TTM and buffer 
moves underneath you can construct an information leak using this and 
give userspace access to memory which is allocated to the driver, but 
not yet initialized.

This way you can leak things like page tables, passwords, kernel data 
etc... in large amounts to userspace and is an absolutely no-go for 
security.

That's why I'm said we need to get this fixed before we upstream this 
patch set here and especially the driver change which is using that.

Regards,
Christian.

Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
> Modern userspace APIs like Vulkan are built on an explicit
> synchronization model.  This doesn't always play nicely with the
> implicit synchronization used in the kernel and assumed by X11 and
> Wayland.  The client -> compositor half of the synchronization isn't too
> bad, at least on intel, because we can control whether or not i915
> synchronizes on the buffer and whether or not it's considered written.
>
> The harder part is the compositor -> client synchronization when we get
> the buffer back from the compositor.  We're required to be able to
> provide the client with a VkSemaphore and VkFence representing the point
> in time where the window system (compositor and/or display) finished
> using the buffer.  With current APIs, it's very hard to do this in such
> a way that we don't get confused by the Vulkan driver's access of the
> buffer.  In particular, once we tell the kernel that we're rendering to
> the buffer again, any CPU waits on the buffer or GPU dependencies will
> wait on some of the client rendering and not just the compositor.
>
> This new IOCTL solves this problem by allowing us to get a snapshot of
> the implicit synchronization state of a given dma-buf in the form of a
> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
> instead of CPU waiting directly, it encapsulates the wait operation, at
> the current moment in time, in a sync_file so we can check/wait on it
> later.  As long as the Vulkan driver does the sync_file export from the
> dma-buf before we re-introduce it for rendering, it will only contain
> fences from the compositor or display.  This allows to accurately turn
> it into a VkFence or VkSemaphore without any over- synchronization.
>
> This patch series actually contains two new ioctls.  There is the export
> one mentioned above as well as an RFC for an import ioctl which provides
> the other half.  The intention is to land the export ioctl since it seems
> like there's no real disagreement on that one.  The import ioctl, however,
> has a lot of debate around it so it's intended to be RFC-only for now.
>
> Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037
> IGT tests: https://patchwork.freedesktop.org/series/90490/
>
> v10 (Jason Ekstrand, Daniel Vetter):
>   - Add reviews/acks
>   - Add a patch to rename _rcu to _unlocked
>   - Split things better so import is clearly RFC status
>
> v11 (Daniel Vetter):
>   - Add more CCs to try and get maintainers
>   - Add a patch to document DMA_BUF_IOCTL_SYNC
>   - Generally better docs
>   - Use separate structs for import/export (easier to document)
>   - Fix an issue in the import patch
>
> v12 (Daniel Vetter):
>   - Better docs for DMA_BUF_IOCTL_SYNC
>
> v12 (Christian König):
>   - Drop the rename patch in favor of Christian's series
>   - Add a comment to the commit message for the dma-buf sync_file export
>     ioctl saying why we made it an ioctl on dma-buf
>
> Cc: Christian König <[e-mail]>
> Cc: Michel Dänzer <[e-mail]>
> Cc: Dave Airlie <[e-mail]>
> Cc: Bas Nieuwenhuizen <[e-mail]>
> Cc: Daniel Stone <[e-mail]>
> Cc: [e-mail]
> Cc: [e-mail]
> Test-with: [e-mail]
>
> Christian König (1):
>    dma-buf: Add dma_fence_array_for_each (v2)
>
> Jason Ekstrand (5):
>    dma-buf: Add dma_resv_get_singleton (v6)
>    dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
>    dma-buf: Add an API for exporting sync files (v12)
>    RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
>    RFC: dma-buf: Add an API for importing sync files (v7)
>
>   Documentation/driver-api/dma-buf.rst |   8 ++
>   drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
>   drivers/dma-buf/dma-fence-array.c    |  27 +++++++
>   drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
>   include/linux/dma-fence-array.h      |  17 +++++
>   include/linux/dma-resv.h             |   2 +
>   include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
>   7 files changed, 369 insertions(+), 1 deletion(-)
>

Jason Ekstrand June 16, 2021, 6:30 p.m. UTC | #2

On Tue, Jun 15, 2021 at 3:41 AM Christian König
<[e-mail]> wrote:
>
> Hi Jason & Daniel,
>
> maybe I should explain once more where the problem with this approach is
> and why I think we need to get that fixed before we can do something
> like this here.
>
> To summarize what this patch here does is that it copies the exclusive
> fence and/or the shared fences into a sync_file. This alone is totally
> unproblematic.
>
> The problem is what this implies. When you need to copy the exclusive
> fence to a sync_file then this means that the driver is at some point
> ignoring the exclusive fence on a buffer object.

Not necessarily.  Part of the point of this is to allow for CPU waits
on a past point in buffers timeline.  Today, we have poll() and
GEM_WAIT both of which wait for the buffer to be idle from whatever
GPU work is currently happening.  We want to wait on something in the
past and ignore anything happening now.

But, to the broader point, maybe?  I'm a little fuzzy on exactly where
i915 inserts and/or depends on fences.

> When you combine that with complex drivers which use TTM and buffer
> moves underneath you can construct an information leak using this and
> give userspace access to memory which is allocated to the driver, but
> not yet initialized.
>
> This way you can leak things like page tables, passwords, kernel data
> etc... in large amounts to userspace and is an absolutely no-go for
> security.

Ugh...  Unfortunately, I'm really out of my depth on the implications
going on here but I think I see your point.

> That's why I'm said we need to get this fixed before we upstream this
> patch set here and especially the driver change which is using that.

Well, i915 has had uAPI for a while to ignore fences.  Those changes
are years in the past.  If we have a real problem here (not sure on
that yet), then we'll have to figure out how to fix it without nuking
uAPI.

--Jason


> Regards,
> Christian.
>
> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
> > Modern userspace APIs like Vulkan are built on an explicit
> > synchronization model.  This doesn't always play nicely with the
> > implicit synchronization used in the kernel and assumed by X11 and
> > Wayland.  The client -> compositor half of the synchronization isn't too
> > bad, at least on intel, because we can control whether or not i915
> > synchronizes on the buffer and whether or not it's considered written.
> >
> > The harder part is the compositor -> client synchronization when we get
> > the buffer back from the compositor.  We're required to be able to
> > provide the client with a VkSemaphore and VkFence representing the point
> > in time where the window system (compositor and/or display) finished
> > using the buffer.  With current APIs, it's very hard to do this in such
> > a way that we don't get confused by the Vulkan driver's access of the
> > buffer.  In particular, once we tell the kernel that we're rendering to
> > the buffer again, any CPU waits on the buffer or GPU dependencies will
> > wait on some of the client rendering and not just the compositor.
> >
> > This new IOCTL solves this problem by allowing us to get a snapshot of
> > the implicit synchronization state of a given dma-buf in the form of a
> > sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
> > instead of CPU waiting directly, it encapsulates the wait operation, at
> > the current moment in time, in a sync_file so we can check/wait on it
> > later.  As long as the Vulkan driver does the sync_file export from the
> > dma-buf before we re-introduce it for rendering, it will only contain
> > fences from the compositor or display.  This allows to accurately turn
> > it into a VkFence or VkSemaphore without any over- synchronization.
> >
> > This patch series actually contains two new ioctls.  There is the export
> > one mentioned above as well as an RFC for an import ioctl which provides
> > the other half.  The intention is to land the export ioctl since it seems
> > like there's no real disagreement on that one.  The import ioctl, however,
> > has a lot of debate around it so it's intended to be RFC-only for now.
> >
> > Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037
> > IGT tests: https://patchwork.freedesktop.org/series/90490/
> >
> > v10 (Jason Ekstrand, Daniel Vetter):
> >   - Add reviews/acks
> >   - Add a patch to rename _rcu to _unlocked
> >   - Split things better so import is clearly RFC status
> >
> > v11 (Daniel Vetter):
> >   - Add more CCs to try and get maintainers
> >   - Add a patch to document DMA_BUF_IOCTL_SYNC
> >   - Generally better docs
> >   - Use separate structs for import/export (easier to document)
> >   - Fix an issue in the import patch
> >
> > v12 (Daniel Vetter):
> >   - Better docs for DMA_BUF_IOCTL_SYNC
> >
> > v12 (Christian König):
> >   - Drop the rename patch in favor of Christian's series
> >   - Add a comment to the commit message for the dma-buf sync_file export
> >     ioctl saying why we made it an ioctl on dma-buf
> >
> > Cc: Christian König <[e-mail]>
> > Cc: Michel Dänzer <[e-mail]>
> > Cc: Dave Airlie <[e-mail]>
> > Cc: Bas Nieuwenhuizen <[e-mail]>
> > Cc: Daniel Stone <[e-mail]>
> > Cc: [e-mail]
> > Cc: [e-mail]
> > Test-with: [e-mail]
> >
> > Christian König (1):
> >    dma-buf: Add dma_fence_array_for_each (v2)
> >
> > Jason Ekstrand (5):
> >    dma-buf: Add dma_resv_get_singleton (v6)
> >    dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
> >    dma-buf: Add an API for exporting sync files (v12)
> >    RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
> >    RFC: dma-buf: Add an API for importing sync files (v7)
> >
> >   Documentation/driver-api/dma-buf.rst |   8 ++
> >   drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
> >   drivers/dma-buf/dma-fence-array.c    |  27 +++++++
> >   drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
> >   include/linux/dma-fence-array.h      |  17 +++++
> >   include/linux/dma-resv.h             |   2 +
> >   include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
> >   7 files changed, 369 insertions(+), 1 deletion(-)
> >
>

Christian König June 17, 2021, 7:37 a.m. UTC | #3

Am 16.06.21 um 20:30 schrieb Jason Ekstrand:
> On Tue, Jun 15, 2021 at 3:41 AM Christian König
> <[e-mail]> wrote:
>> Hi Jason & Daniel,
>>
>> maybe I should explain once more where the problem with this approach is
>> and why I think we need to get that fixed before we can do something
>> like this here.
>>
>> To summarize what this patch here does is that it copies the exclusive
>> fence and/or the shared fences into a sync_file. This alone is totally
>> unproblematic.
>>
>> The problem is what this implies. When you need to copy the exclusive
>> fence to a sync_file then this means that the driver is at some point
>> ignoring the exclusive fence on a buffer object.
> Not necessarily.  Part of the point of this is to allow for CPU waits
> on a past point in buffers timeline.  Today, we have poll() and
> GEM_WAIT both of which wait for the buffer to be idle from whatever
> GPU work is currently happening.  We want to wait on something in the
> past and ignore anything happening now.

Good point, yes that is indeed a valid use case.

> But, to the broader point, maybe?  I'm a little fuzzy on exactly where
> i915 inserts and/or depends on fences.
>
>> When you combine that with complex drivers which use TTM and buffer
>> moves underneath you can construct an information leak using this and
>> give userspace access to memory which is allocated to the driver, but
>> not yet initialized.
>>
>> This way you can leak things like page tables, passwords, kernel data
>> etc... in large amounts to userspace and is an absolutely no-go for
>> security.
> Ugh...  Unfortunately, I'm really out of my depth on the implications
> going on here but I think I see your point.
>
>> That's why I'm said we need to get this fixed before we upstream this
>> patch set here and especially the driver change which is using that.
> Well, i915 has had uAPI for a while to ignore fences.

Yeah, exactly that's illegal.

At least the kernel internal fences like moving or clearing a buffer 
object needs to be taken into account before a driver is allowed to 
access a buffer.

Otherwise we have an information leak worth a CVE and that is certainly 
not something we want.

> Those changes are years in the past.  If we have a real problem here (not sure on
> that yet), then we'll have to figure out how to fix it without nuking
> uAPI.

Well, that was the basic idea of attaching flags to the fences in the 
dma_resv object.

In other words you clearly denote when you have to wait for a fence 
before accessing a buffer or you cause a security issue.

Christian.

>
> --Jason
>
>
>> Regards,
>> Christian.
>>
>> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
>>> Modern userspace APIs like Vulkan are built on an explicit
>>> synchronization model.  This doesn't always play nicely with the
>>> implicit synchronization used in the kernel and assumed by X11 and
>>> Wayland.  The client -> compositor half of the synchronization isn't too
>>> bad, at least on intel, because we can control whether or not i915
>>> synchronizes on the buffer and whether or not it's considered written.
>>>
>>> The harder part is the compositor -> client synchronization when we get
>>> the buffer back from the compositor.  We're required to be able to
>>> provide the client with a VkSemaphore and VkFence representing the point
>>> in time where the window system (compositor and/or display) finished
>>> using the buffer.  With current APIs, it's very hard to do this in such
>>> a way that we don't get confused by the Vulkan driver's access of the
>>> buffer.  In particular, once we tell the kernel that we're rendering to
>>> the buffer again, any CPU waits on the buffer or GPU dependencies will
>>> wait on some of the client rendering and not just the compositor.
>>>
>>> This new IOCTL solves this problem by allowing us to get a snapshot of
>>> the implicit synchronization state of a given dma-buf in the form of a
>>> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
>>> instead of CPU waiting directly, it encapsulates the wait operation, at
>>> the current moment in time, in a sync_file so we can check/wait on it
>>> later.  As long as the Vulkan driver does the sync_file export from the
>>> dma-buf before we re-introduce it for rendering, it will only contain
>>> fences from the compositor or display.  This allows to accurately turn
>>> it into a VkFence or VkSemaphore without any over- synchronization.
>>>
>>> This patch series actually contains two new ioctls.  There is the export
>>> one mentioned above as well as an RFC for an import ioctl which provides
>>> the other half.  The intention is to land the export ioctl since it seems
>>> like there's no real disagreement on that one.  The import ioctl, however,
>>> has a lot of debate around it so it's intended to be RFC-only for now.
>>>
>>> Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cb094e69c94814727939508d930f4ca94%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637594650220923783%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=xUwaiuw8Qt3d37%2F6NYOHU3K%2FMFwsvg79rno9zTNodRs%3D&amp;reserved=0
>>> IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cb094e69c94814727939508d930f4ca94%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637594650220923783%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=wygYaeVg%2BXmfeEUC45lWH5GgNBukl0%2B%2FMpT5u9LKYDI%3D&amp;reserved=0
>>>
>>> v10 (Jason Ekstrand, Daniel Vetter):
>>>    - Add reviews/acks
>>>    - Add a patch to rename _rcu to _unlocked
>>>    - Split things better so import is clearly RFC status
>>>
>>> v11 (Daniel Vetter):
>>>    - Add more CCs to try and get maintainers
>>>    - Add a patch to document DMA_BUF_IOCTL_SYNC
>>>    - Generally better docs
>>>    - Use separate structs for import/export (easier to document)
>>>    - Fix an issue in the import patch
>>>
>>> v12 (Daniel Vetter):
>>>    - Better docs for DMA_BUF_IOCTL_SYNC
>>>
>>> v12 (Christian König):
>>>    - Drop the rename patch in favor of Christian's series
>>>    - Add a comment to the commit message for the dma-buf sync_file export
>>>      ioctl saying why we made it an ioctl on dma-buf
>>>
>>> Cc: Christian König <[e-mail]>
>>> Cc: Michel Dänzer <[e-mail]>
>>> Cc: Dave Airlie <[e-mail]>
>>> Cc: Bas Nieuwenhuizen <[e-mail]>
>>> Cc: Daniel Stone <[e-mail]>
>>> Cc: [e-mail]
>>> Cc: [e-mail]
>>> Test-with: [e-mail]
>>>
>>> Christian König (1):
>>>     dma-buf: Add dma_fence_array_for_each (v2)
>>>
>>> Jason Ekstrand (5):
>>>     dma-buf: Add dma_resv_get_singleton (v6)
>>>     dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
>>>     dma-buf: Add an API for exporting sync files (v12)
>>>     RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
>>>     RFC: dma-buf: Add an API for importing sync files (v7)
>>>
>>>    Documentation/driver-api/dma-buf.rst |   8 ++
>>>    drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
>>>    drivers/dma-buf/dma-fence-array.c    |  27 +++++++
>>>    drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
>>>    include/linux/dma-fence-array.h      |  17 +++++
>>>    include/linux/dma-resv.h             |   2 +
>>>    include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
>>>    7 files changed, 369 insertions(+), 1 deletion(-)
>>>

Daniel Vetter June 17, 2021, 7:58 p.m. UTC | #4

On Thu, Jun 17, 2021 at 09:37:36AM +0200, Christian König wrote:
> Am 16.06.21 um 20:30 schrieb Jason Ekstrand:
> > On Tue, Jun 15, 2021 at 3:41 AM Christian König
> > <[e-mail]> wrote:
> > > Hi Jason & Daniel,
> > > 
> > > maybe I should explain once more where the problem with this approach is
> > > and why I think we need to get that fixed before we can do something
> > > like this here.
> > > 
> > > To summarize what this patch here does is that it copies the exclusive
> > > fence and/or the shared fences into a sync_file. This alone is totally
> > > unproblematic.
> > > 
> > > The problem is what this implies. When you need to copy the exclusive
> > > fence to a sync_file then this means that the driver is at some point
> > > ignoring the exclusive fence on a buffer object.
> > Not necessarily.  Part of the point of this is to allow for CPU waits
> > on a past point in buffers timeline.  Today, we have poll() and
> > GEM_WAIT both of which wait for the buffer to be idle from whatever
> > GPU work is currently happening.  We want to wait on something in the
> > past and ignore anything happening now.
> 
> Good point, yes that is indeed a valid use case.
> 
> > But, to the broader point, maybe?  I'm a little fuzzy on exactly where
> > i915 inserts and/or depends on fences.
> > 
> > > When you combine that with complex drivers which use TTM and buffer
> > > moves underneath you can construct an information leak using this and
> > > give userspace access to memory which is allocated to the driver, but
> > > not yet initialized.
> > > 
> > > This way you can leak things like page tables, passwords, kernel data
> > > etc... in large amounts to userspace and is an absolutely no-go for
> > > security.
> > Ugh...  Unfortunately, I'm really out of my depth on the implications
> > going on here but I think I see your point.
> > 
> > > That's why I'm said we need to get this fixed before we upstream this
> > > patch set here and especially the driver change which is using that.
> > Well, i915 has had uAPI for a while to ignore fences.
> 
> Yeah, exactly that's illegal.

You're a few years too late with closing that barn door. The following
drives have this concept
- i915
- msm
- etnaviv

Because you can't write a competent vulkan driver without this. This was
discussed at absolute epic length in various xdcs iirc. We did ignore a
bit the vram/ttm/bo-moving problem because all the people present were
hacking on integrated gpu (see list above), but that just means we need to
treat the ttm_bo->moving fence properly.

> At least the kernel internal fences like moving or clearing a buffer object
> needs to be taken into account before a driver is allowed to access a
> buffer.

Yes i915 needs to make sure it never ignores ttm_bo->moving.

For dma-buf this isn't actually a problem, because dma-buf are pinned. You
can't move them while other drivers are using them, hence there's not
actually a ttm_bo->moving fence we can ignore.

p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw
these other drivers) need to change before they can do dynamic dma-buf.

> Otherwise we have an information leak worth a CVE and that is certainly not
> something we want.

Because yes otherwise we get a CVE. But right now I don't think we have
one.

We do have a quite big confusion on what exactly the signaling ordering is
supposed to be between exclusive and the collective set of shared fences,
and there's some unifying that needs to happen here. But I think what
Jason implements here in the import ioctl is the most defensive version
possible, so really can't break any driver. It really works like you have
an ad-hoc gpu engine that does nothing itself, but waits for the current
exclusive fence and then sets the exclusive fence with its "CS" completion
fence.

That's imo perfectly legit use-case.

Same for the export one. Waiting for a previous snapshot of implicit
fences is imo perfectly ok use-case and useful for compositors - client
might soon start more rendering, and on some drivers that always results
in the exclusive slot being set, so if you dont take a snapshot you
oversync real bad for your atomic flip.

> > Those changes are years in the past.  If we have a real problem here (not sure on
> > that yet), then we'll have to figure out how to fix it without nuking
> > uAPI.
> 
> Well, that was the basic idea of attaching flags to the fences in the
> dma_resv object.
> 
> In other words you clearly denote when you have to wait for a fence before
> accessing a buffer or you cause a security issue.

Replied somewhere else, and I do kinda like the flag idea. But the problem
is we first need a ton more encapsulation and review of drivers before we
can change the internals. One thing at a time.

And yes for amdgpu this gets triple-hard because you both have the
ttm_bo->moving fence _and_ the current uapi of using fence ownership _and_
you need to figure out how to support vulkan properly with true opt-in
fencing. I'm pretty sure it's doable, I'm just not finding any time
anywhere to hack on these patches - too many other fires :-(

Cheers, Daniel

> 
> Christian.
> 
> > 
> > --Jason
> > 
> > 
> > > Regards,
> > > Christian.
> > > 
> > > Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
> > > > Modern userspace APIs like Vulkan are built on an explicit
> > > > synchronization model.  This doesn't always play nicely with the
> > > > implicit synchronization used in the kernel and assumed by X11 and
> > > > Wayland.  The client -> compositor half of the synchronization isn't too
> > > > bad, at least on intel, because we can control whether or not i915
> > > > synchronizes on the buffer and whether or not it's considered written.
> > > > 
> > > > The harder part is the compositor -> client synchronization when we get
> > > > the buffer back from the compositor.  We're required to be able to
> > > > provide the client with a VkSemaphore and VkFence representing the point
> > > > in time where the window system (compositor and/or display) finished
> > > > using the buffer.  With current APIs, it's very hard to do this in such
> > > > a way that we don't get confused by the Vulkan driver's access of the
> > > > buffer.  In particular, once we tell the kernel that we're rendering to
> > > > the buffer again, any CPU waits on the buffer or GPU dependencies will
> > > > wait on some of the client rendering and not just the compositor.
> > > > 
> > > > This new IOCTL solves this problem by allowing us to get a snapshot of
> > > > the implicit synchronization state of a given dma-buf in the form of a
> > > > sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
> > > > instead of CPU waiting directly, it encapsulates the wait operation, at
> > > > the current moment in time, in a sync_file so we can check/wait on it
> > > > later.  As long as the Vulkan driver does the sync_file export from the
> > > > dma-buf before we re-introduce it for rendering, it will only contain
> > > > fences from the compositor or display.  This allows to accurately turn
> > > > it into a VkFence or VkSemaphore without any over- synchronization.
> > > > 
> > > > This patch series actually contains two new ioctls.  There is the export
> > > > one mentioned above as well as an RFC for an import ioctl which provides
> > > > the other half.  The intention is to land the export ioctl since it seems
> > > > like there's no real disagreement on that one.  The import ioctl, however,
> > > > has a lot of debate around it so it's intended to be RFC-only for now.
> > > > 
> > > > Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cb094e69c94814727939508d930f4ca94%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637594650220923783%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=xUwaiuw8Qt3d37%2F6NYOHU3K%2FMFwsvg79rno9zTNodRs%3D&amp;reserved=0
> > > > IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cb094e69c94814727939508d930f4ca94%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637594650220923783%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=wygYaeVg%2BXmfeEUC45lWH5GgNBukl0%2B%2FMpT5u9LKYDI%3D&amp;reserved=0
> > > > 
> > > > v10 (Jason Ekstrand, Daniel Vetter):
> > > >    - Add reviews/acks
> > > >    - Add a patch to rename _rcu to _unlocked
> > > >    - Split things better so import is clearly RFC status
> > > > 
> > > > v11 (Daniel Vetter):
> > > >    - Add more CCs to try and get maintainers
> > > >    - Add a patch to document DMA_BUF_IOCTL_SYNC
> > > >    - Generally better docs
> > > >    - Use separate structs for import/export (easier to document)
> > > >    - Fix an issue in the import patch
> > > > 
> > > > v12 (Daniel Vetter):
> > > >    - Better docs for DMA_BUF_IOCTL_SYNC
> > > > 
> > > > v12 (Christian König):
> > > >    - Drop the rename patch in favor of Christian's series
> > > >    - Add a comment to the commit message for the dma-buf sync_file export
> > > >      ioctl saying why we made it an ioctl on dma-buf
> > > > 
> > > > Cc: Christian König <[e-mail]>
> > > > Cc: Michel Dänzer <[e-mail]>
> > > > Cc: Dave Airlie <[e-mail]>
> > > > Cc: Bas Nieuwenhuizen <[e-mail]>
> > > > Cc: Daniel Stone <[e-mail]>
> > > > Cc: [e-mail]
> > > > Cc: [e-mail]
> > > > Test-with: [e-mail]
> > > > 
> > > > Christian König (1):
> > > >     dma-buf: Add dma_fence_array_for_each (v2)
> > > > 
> > > > Jason Ekstrand (5):
> > > >     dma-buf: Add dma_resv_get_singleton (v6)
> > > >     dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
> > > >     dma-buf: Add an API for exporting sync files (v12)
> > > >     RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
> > > >     RFC: dma-buf: Add an API for importing sync files (v7)
> > > > 
> > > >    Documentation/driver-api/dma-buf.rst |   8 ++
> > > >    drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
> > > >    drivers/dma-buf/dma-fence-array.c    |  27 +++++++
> > > >    drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
> > > >    include/linux/dma-fence-array.h      |  17 +++++
> > > >    include/linux/dma-resv.h             |   2 +
> > > >    include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
> > > >    7 files changed, 369 insertions(+), 1 deletion(-)
> > > > 
> 
> _______________________________________________
> mesa-dev mailing list
> [e-mail]
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Christian König June 18, 2021, 9:15 a.m. UTC | #5

Am 17.06.21 um 21:58 schrieb Daniel Vetter:
> On Thu, Jun 17, 2021 at 09:37:36AM +0200, Christian König wrote:
>> [SNIP]
>>> But, to the broader point, maybe?  I'm a little fuzzy on exactly where
>>> i915 inserts and/or depends on fences.
>>>
>>>> When you combine that with complex drivers which use TTM and buffer
>>>> moves underneath you can construct an information leak using this and
>>>> give userspace access to memory which is allocated to the driver, but
>>>> not yet initialized.
>>>>
>>>> This way you can leak things like page tables, passwords, kernel data
>>>> etc... in large amounts to userspace and is an absolutely no-go for
>>>> security.
>>> Ugh...  Unfortunately, I'm really out of my depth on the implications
>>> going on here but I think I see your point.
>>>
>>>> That's why I'm said we need to get this fixed before we upstream this
>>>> patch set here and especially the driver change which is using that.
>>> Well, i915 has had uAPI for a while to ignore fences.
>> Yeah, exactly that's illegal.
> You're a few years too late with closing that barn door. The following
> drives have this concept
> - i915
> - msm
> - etnaviv
>
> Because you can't write a competent vulkan driver without this.

WHAT? ^^

> This was discussed at absolute epic length in various xdcs iirc. We did ignore a
> bit the vram/ttm/bo-moving problem because all the people present were
> hacking on integrated gpu (see list above), but that just means we need to
> treat the ttm_bo->moving fence properly.

I should have visited more XDCs in the past, the problem is much larger 
than this.

But I now start to understand what you are doing with that design and 
why it looks so messy to me, amdgpu is just currently the only driver 
which does Vulkan and complex memory management at the same time.

>> At least the kernel internal fences like moving or clearing a buffer object
>> needs to be taken into account before a driver is allowed to access a
>> buffer.
> Yes i915 needs to make sure it never ignores ttm_bo->moving.

No, that is only the tip of the iceberg. See TTM for example also puts 
fences which drivers needs to wait for into the shared slots. Same thing 
for use cases like clear on release etc....

 From my point of view the main purpose of the dma_resv object is to 
serve memory management, synchronization for command submission is just 
a secondary use case.

And that drivers choose to ignore the exclusive fence is an absolutely 
no-go from a memory management and security point of view. Exclusive 
access means exclusive access. Ignoring that won't work.

The only thing which saved us so far is the fact that drivers doing this 
are not that complex.

BTW: How does it even work? I mean then you would run into the same 
problem as amdgpu with its page table update fences, e.g. that your 
shared fences might signal before the exclusive one.

> For dma-buf this isn't actually a problem, because dma-buf are pinned. You
> can't move them while other drivers are using them, hence there's not
> actually a ttm_bo->moving fence we can ignore.
>
> p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw
> these other drivers) need to change before they can do dynamic dma-buf.
>
>> Otherwise we have an information leak worth a CVE and that is certainly not
>> something we want.
> Because yes otherwise we get a CVE. But right now I don't think we have
> one.

Yeah, agree. But this is just because of coincident and not because of 
good engineering :)

> We do have a quite big confusion on what exactly the signaling ordering is
> supposed to be between exclusive and the collective set of shared fences,
> and there's some unifying that needs to happen here. But I think what
> Jason implements here in the import ioctl is the most defensive version
> possible, so really can't break any driver. It really works like you have
> an ad-hoc gpu engine that does nothing itself, but waits for the current
> exclusive fence and then sets the exclusive fence with its "CS" completion
> fence.
>
> That's imo perfectly legit use-case.

The use case is certainly legit, but I'm not sure if merging this at the 
moment is a good idea.

Your note that drivers are already ignoring the exclusive fence in the 
dma_resv object was eye opening to me. And I now have the very strong 
feeling that the synchronization and the design of the dma_resv object 
is even more messy then I thought it is.

To summarize we can be really lucky that it didn't blow up into our 
faces already.

> Same for the export one. Waiting for a previous snapshot of implicit
> fences is imo perfectly ok use-case and useful for compositors - client
> might soon start more rendering, and on some drivers that always results
> in the exclusive slot being set, so if you dont take a snapshot you
> oversync real bad for your atomic flip.

The export use case is unproblematic as far as I can see.

>>> Those changes are years in the past.  If we have a real problem here (not sure on
>>> that yet), then we'll have to figure out how to fix it without nuking
>>> uAPI.
>> Well, that was the basic idea of attaching flags to the fences in the
>> dma_resv object.
>>
>> In other words you clearly denote when you have to wait for a fence before
>> accessing a buffer or you cause a security issue.
> Replied somewhere else, and I do kinda like the flag idea. But the problem
> is we first need a ton more encapsulation and review of drivers before we
> can change the internals. One thing at a time.

Ok how should we then proceed?

The large patch set I've send out to convert all users of the shared 
fence list to a for_each API is a step into the right direction I think, 
but there is still a bit more todo.

> And yes for amdgpu this gets triple-hard because you both have the
> ttm_bo->moving fence _and_ the current uapi of using fence ownership _and_
> you need to figure out how to support vulkan properly with true opt-in
> fencing.

Well I have been pondering on that for a bit and I came to the 
conclusion that it is actually not a problem at all.

See radeon, nouveau, msm etc... all implement functions that they don't 
wait for fences from the same timeline, context, engine. That amdgpu 
doesn't wait for fences from the same process can be seen as just a 
special case of this.

>   I'm pretty sure it's doable, I'm just not finding any time
> anywhere to hack on these patches - too many other fires :-(

Well I'm here. Let's just agree on the direction and I can do the coding.

What I need help with is all the auditing. For example I still haven't 
wrapped my head around how i915 does the synchronization.

Best regards,
Christian.

>
> Cheers, Daniel
>
>> Christian.
>>
>>> --Jason
>>>
>>>
>>>> Regards,
>>>> Christian.
>>>>
>>>> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
>>>>> Modern userspace APIs like Vulkan are built on an explicit
>>>>> synchronization model.  This doesn't always play nicely with the
>>>>> implicit synchronization used in the kernel and assumed by X11 and
>>>>> Wayland.  The client -> compositor half of the synchronization isn't too
>>>>> bad, at least on intel, because we can control whether or not i915
>>>>> synchronizes on the buffer and whether or not it's considered written.
>>>>>
>>>>> The harder part is the compositor -> client synchronization when we get
>>>>> the buffer back from the compositor.  We're required to be able to
>>>>> provide the client with a VkSemaphore and VkFence representing the point
>>>>> in time where the window system (compositor and/or display) finished
>>>>> using the buffer.  With current APIs, it's very hard to do this in such
>>>>> a way that we don't get confused by the Vulkan driver's access of the
>>>>> buffer.  In particular, once we tell the kernel that we're rendering to
>>>>> the buffer again, any CPU waits on the buffer or GPU dependencies will
>>>>> wait on some of the client rendering and not just the compositor.
>>>>>
>>>>> This new IOCTL solves this problem by allowing us to get a snapshot of
>>>>> the implicit synchronization state of a given dma-buf in the form of a
>>>>> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
>>>>> instead of CPU waiting directly, it encapsulates the wait operation, at
>>>>> the current moment in time, in a sync_file so we can check/wait on it
>>>>> later.  As long as the Vulkan driver does the sync_file export from the
>>>>> dma-buf before we re-introduce it for rendering, it will only contain
>>>>> fences from the compositor or display.  This allows to accurately turn
>>>>> it into a VkFence or VkSemaphore without any over- synchronization.
>>>>>
>>>>> This patch series actually contains two new ioctls.  There is the export
>>>>> one mentioned above as well as an RFC for an import ioctl which provides
>>>>> the other half.  The intention is to land the export ioctl since it seems
>>>>> like there's no real disagreement on that one.  The import ioctl, however,
>>>>> has a lot of debate around it so it's intended to be RFC-only for now.
>>>>>
>>>>> Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=TAFUHFCSFcfrP7bjkBtVin4VX2vC6OakwbrqwlZOW8c%3D&reserved=0
>>>>> IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=lbn%2B81KXds9pYnFUYWi9hzLNP3PLKij4RVjV97UyZ3s%3D&reserved=0
>>>>>
>>>>> v10 (Jason Ekstrand, Daniel Vetter):
>>>>>     - Add reviews/acks
>>>>>     - Add a patch to rename _rcu to _unlocked
>>>>>     - Split things better so import is clearly RFC status
>>>>>
>>>>> v11 (Daniel Vetter):
>>>>>     - Add more CCs to try and get maintainers
>>>>>     - Add a patch to document DMA_BUF_IOCTL_SYNC
>>>>>     - Generally better docs
>>>>>     - Use separate structs for import/export (easier to document)
>>>>>     - Fix an issue in the import patch
>>>>>
>>>>> v12 (Daniel Vetter):
>>>>>     - Better docs for DMA_BUF_IOCTL_SYNC
>>>>>
>>>>> v12 (Christian König):
>>>>>     - Drop the rename patch in favor of Christian's series
>>>>>     - Add a comment to the commit message for the dma-buf sync_file export
>>>>>       ioctl saying why we made it an ioctl on dma-buf
>>>>>
>>>>> Cc: Christian König <[e-mail]>
>>>>> Cc: Michel Dänzer <[e-mail]>
>>>>> Cc: Dave Airlie <[e-mail]>
>>>>> Cc: Bas Nieuwenhuizen <[e-mail]>
>>>>> Cc: Daniel Stone <[e-mail]>
>>>>> Cc: [e-mail]
>>>>> Cc: [e-mail]
>>>>> Test-with: [e-mail]
>>>>>
>>>>> Christian König (1):
>>>>>      dma-buf: Add dma_fence_array_for_each (v2)
>>>>>
>>>>> Jason Ekstrand (5):
>>>>>      dma-buf: Add dma_resv_get_singleton (v6)
>>>>>      dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
>>>>>      dma-buf: Add an API for exporting sync files (v12)
>>>>>      RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
>>>>>      RFC: dma-buf: Add an API for importing sync files (v7)
>>>>>
>>>>>     Documentation/driver-api/dma-buf.rst |   8 ++
>>>>>     drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
>>>>>     drivers/dma-buf/dma-fence-array.c    |  27 +++++++
>>>>>     drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
>>>>>     include/linux/dma-fence-array.h      |  17 +++++
>>>>>     include/linux/dma-resv.h             |   2 +
>>>>>     include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
>>>>>     7 files changed, 369 insertions(+), 1 deletion(-)
>>>>>
>> _______________________________________________
>> mesa-dev mailing list
>> [e-mail]
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fmesa-dev&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=QxQDoUKzo57tmQxD0aEjPs8ATpCOBQiQ5W%2FDh8dbEqU%3D&amp;reserved=0

Jason Ekstrand June 18, 2021, 1:54 p.m. UTC | #6

On Fri, Jun 18, 2021 at 4:15 AM Christian König
<[e-mail]> wrote:
>
> Am 17.06.21 um 21:58 schrieb Daniel Vetter:
> > On Thu, Jun 17, 2021 at 09:37:36AM +0200, Christian König wrote:
> >> [SNIP]
> >>> But, to the broader point, maybe?  I'm a little fuzzy on exactly where
> >>> i915 inserts and/or depends on fences.
> >>>
> >>>> When you combine that with complex drivers which use TTM and buffer
> >>>> moves underneath you can construct an information leak using this and
> >>>> give userspace access to memory which is allocated to the driver, but
> >>>> not yet initialized.
> >>>>
> >>>> This way you can leak things like page tables, passwords, kernel data
> >>>> etc... in large amounts to userspace and is an absolutely no-go for
> >>>> security.
> >>> Ugh...  Unfortunately, I'm really out of my depth on the implications
> >>> going on here but I think I see your point.
> >>>
> >>>> That's why I'm said we need to get this fixed before we upstream this
> >>>> patch set here and especially the driver change which is using that.
> >>> Well, i915 has had uAPI for a while to ignore fences.
> >> Yeah, exactly that's illegal.
> > You're a few years too late with closing that barn door. The following
> > drives have this concept
> > - i915
> > - msm
> > - etnaviv
> >
> > Because you can't write a competent vulkan driver without this.
>
> WHAT? ^^

I think it's fair to say that you can't write a competent Vulkan
driver with implicit sync getting in the way.  Since AMD removes all
the implicit sync internally, this solves most of the problems there.
RADV does suffer some heartache around WSI which is related but I'd
hardly say that makes it incompetent.

> > This was discussed at absolute epic length in various xdcs iirc. We did ignore a
> > bit the vram/ttm/bo-moving problem because all the people present were
> > hacking on integrated gpu (see list above), but that just means we need to
> > treat the ttm_bo->moving fence properly.
>
> I should have visited more XDCs in the past, the problem is much larger
> than this.
>
> But I now start to understand what you are doing with that design and
> why it looks so messy to me, amdgpu is just currently the only driver
> which does Vulkan and complex memory management at the same time.

I'm reading "complex memory management" here and elsewhere as "has
VRAM".  All memory management is complex; shuffling to/from VRAM just
adds more layers.

> >> At least the kernel internal fences like moving or clearing a buffer object
> >> needs to be taken into account before a driver is allowed to access a
> >> buffer.
> > Yes i915 needs to make sure it never ignores ttm_bo->moving.
>
> No, that is only the tip of the iceberg. See TTM for example also puts
> fences which drivers needs to wait for into the shared slots. Same thing
> for use cases like clear on release etc....
>
>  From my point of view the main purpose of the dma_resv object is to
> serve memory management, synchronization for command submission is just
> a secondary use case.
>
> And that drivers choose to ignore the exclusive fence is an absolutely
> no-go from a memory management and security point of view. Exclusive
> access means exclusive access. Ignoring that won't work.
>
> The only thing which saved us so far is the fact that drivers doing this
> are not that complex.

I think there's something important in Daniel's list above with
drivers that have a "no implicit sync uAPI": None of them are TTM
based.  We (i915) have been doing our own thing for memory management
for a while and it may not follow your TTM mental model.  Sure,
there's a dma_resv in our BOs and we can import/export dma-buf but
that doesn't mean that, internally, we think of it the same way.  I
say this in very generic terms because there are a whole lot of
details that I don't know.  What I do know is that, whatever we're
doing, it's been pretty robust for many years.

That said, we are moving to TTM so, if I'm right that this is a GEM
<-> TTM conflict, we've got some thinking to do.

> BTW: How does it even work? I mean then you would run into the same
> problem as amdgpu with its page table update fences, e.g. that your
> shared fences might signal before the exclusive one.
>
> > For dma-buf this isn't actually a problem, because dma-buf are pinned. You
> > can't move them while other drivers are using them, hence there's not
> > actually a ttm_bo->moving fence we can ignore.
> >
> > p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw
> > these other drivers) need to change before they can do dynamic dma-buf.
> >
> >> Otherwise we have an information leak worth a CVE and that is certainly not
> >> something we want.
> > Because yes otherwise we get a CVE. But right now I don't think we have
> > one.
>
> Yeah, agree. But this is just because of coincident and not because of
> good engineering :)
>
> > We do have a quite big confusion on what exactly the signaling ordering is
> > supposed to be between exclusive and the collective set of shared fences,
> > and there's some unifying that needs to happen here. But I think what
> > Jason implements here in the import ioctl is the most defensive version
> > possible, so really can't break any driver. It really works like you have
> > an ad-hoc gpu engine that does nothing itself, but waits for the current
> > exclusive fence and then sets the exclusive fence with its "CS" completion
> > fence.
> >
> > That's imo perfectly legit use-case.
>
> The use case is certainly legit, but I'm not sure if merging this at the
> moment is a good idea.
>
> Your note that drivers are already ignoring the exclusive fence in the
> dma_resv object was eye opening to me. And I now have the very strong
> feeling that the synchronization and the design of the dma_resv object
> is even more messy then I thought it is.
>
> To summarize we can be really lucky that it didn't blow up into our
> faces already.
>
> > Same for the export one. Waiting for a previous snapshot of implicit
> > fences is imo perfectly ok use-case and useful for compositors - client
> > might soon start more rendering, and on some drivers that always results
> > in the exclusive slot being set, so if you dont take a snapshot you
> > oversync real bad for your atomic flip.
>
> The export use case is unproblematic as far as I can see.

Then why are we holding it up?  I'm not asking to have import merged.
That's still labled RFC and I've said over and over that it's not
baked and I'm not convinced it helps all that much.

> >>> Those changes are years in the past.  If we have a real problem here (not sure on
> >>> that yet), then we'll have to figure out how to fix it without nuking
> >>> uAPI.
> >> Well, that was the basic idea of attaching flags to the fences in the
> >> dma_resv object.
> >>
> >> In other words you clearly denote when you have to wait for a fence before
> >> accessing a buffer or you cause a security issue.
> > Replied somewhere else, and I do kinda like the flag idea. But the problem
> > is we first need a ton more encapsulation and review of drivers before we
> > can change the internals. One thing at a time.

I think I'm warming to flags as well.  I didn't like them at first but
I think they actually make quite a bit of sense.  Unlike the explicit
fence where ignoring it can lead to a security hole, the worst that
happens if someone forgets a flag somewhere is a bit of memory
corruption and garbage on-screen.  That seems fairly non-dangerous to
me.

> Ok how should we then proceed?
>
> The large patch set I've send out to convert all users of the shared
> fence list to a for_each API is a step into the right direction I think,
> but there is still a bit more todo.
>
> > And yes for amdgpu this gets triple-hard because you both have the
> > ttm_bo->moving fence _and_ the current uapi of using fence ownership _and_
> > you need to figure out how to support vulkan properly with true opt-in
> > fencing.
>
> Well I have been pondering on that for a bit and I came to the
> conclusion that it is actually not a problem at all.
>
> See radeon, nouveau, msm etc... all implement functions that they don't
> wait for fences from the same timeline, context, engine. That amdgpu
> doesn't wait for fences from the same process can be seen as just a
> special case of this.

That doesn't totally solve the issue, though.  RADV suffers in the WSI
arena today from too much cross-process implicit sharing.  I do think
you want some sort of "ignore implicit sync" API but, in this new
world of flags, it would look more like "don't bother looking for
shared fences flagged write".  You'd still respect the exclusive
fence, if there is one, and you'd still add a shared fence.  You just
wouldn't bother with implicit sync.  Should be safe, right?

--Jason

> >   I'm pretty sure it's doable, I'm just not finding any time
> > anywhere to hack on these patches - too many other fires :-(
>
> Well I'm here. Let's just agree on the direction and I can do the coding.
>
> What I need help with is all the auditing. For example I still haven't
> wrapped my head around how i915 does the synchronization.
>
> Best regards,
> Christian.
>
> >
> > Cheers, Daniel
> >
> >> Christian.
> >>
> >>> --Jason
> >>>
> >>>
> >>>> Regards,
> >>>> Christian.
> >>>>
> >>>> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
> >>>>> Modern userspace APIs like Vulkan are built on an explicit
> >>>>> synchronization model.  This doesn't always play nicely with the
> >>>>> implicit synchronization used in the kernel and assumed by X11 and
> >>>>> Wayland.  The client -> compositor half of the synchronization isn't too
> >>>>> bad, at least on intel, because we can control whether or not i915
> >>>>> synchronizes on the buffer and whether or not it's considered written.
> >>>>>
> >>>>> The harder part is the compositor -> client synchronization when we get
> >>>>> the buffer back from the compositor.  We're required to be able to
> >>>>> provide the client with a VkSemaphore and VkFence representing the point
> >>>>> in time where the window system (compositor and/or display) finished
> >>>>> using the buffer.  With current APIs, it's very hard to do this in such
> >>>>> a way that we don't get confused by the Vulkan driver's access of the
> >>>>> buffer.  In particular, once we tell the kernel that we're rendering to
> >>>>> the buffer again, any CPU waits on the buffer or GPU dependencies will
> >>>>> wait on some of the client rendering and not just the compositor.
> >>>>>
> >>>>> This new IOCTL solves this problem by allowing us to get a snapshot of
> >>>>> the implicit synchronization state of a given dma-buf in the form of a
> >>>>> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
> >>>>> instead of CPU waiting directly, it encapsulates the wait operation, at
> >>>>> the current moment in time, in a sync_file so we can check/wait on it
> >>>>> later.  As long as the Vulkan driver does the sync_file export from the
> >>>>> dma-buf before we re-introduce it for rendering, it will only contain
> >>>>> fences from the compositor or display.  This allows to accurately turn
> >>>>> it into a VkFence or VkSemaphore without any over- synchronization.
> >>>>>
> >>>>> This patch series actually contains two new ioctls.  There is the export
> >>>>> one mentioned above as well as an RFC for an import ioctl which provides
> >>>>> the other half.  The intention is to land the export ioctl since it seems
> >>>>> like there's no real disagreement on that one.  The import ioctl, however,
> >>>>> has a lot of debate around it so it's intended to be RFC-only for now.
> >>>>>
> >>>>> Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=TAFUHFCSFcfrP7bjkBtVin4VX2vC6OakwbrqwlZOW8c%3D&amp;reserved=0
> >>>>> IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=lbn%2B81KXds9pYnFUYWi9hzLNP3PLKij4RVjV97UyZ3s%3D&amp;reserved=0
> >>>>>
> >>>>> v10 (Jason Ekstrand, Daniel Vetter):
> >>>>>     - Add reviews/acks
> >>>>>     - Add a patch to rename _rcu to _unlocked
> >>>>>     - Split things better so import is clearly RFC status
> >>>>>
> >>>>> v11 (Daniel Vetter):
> >>>>>     - Add more CCs to try and get maintainers
> >>>>>     - Add a patch to document DMA_BUF_IOCTL_SYNC
> >>>>>     - Generally better docs
> >>>>>     - Use separate structs for import/export (easier to document)
> >>>>>     - Fix an issue in the import patch
> >>>>>
> >>>>> v12 (Daniel Vetter):
> >>>>>     - Better docs for DMA_BUF_IOCTL_SYNC
> >>>>>
> >>>>> v12 (Christian König):
> >>>>>     - Drop the rename patch in favor of Christian's series
> >>>>>     - Add a comment to the commit message for the dma-buf sync_file export
> >>>>>       ioctl saying why we made it an ioctl on dma-buf
> >>>>>
> >>>>> Cc: Christian König <[e-mail]>
> >>>>> Cc: Michel Dänzer <[e-mail]>
> >>>>> Cc: Dave Airlie <[e-mail]>
> >>>>> Cc: Bas Nieuwenhuizen <[e-mail]>
> >>>>> Cc: Daniel Stone <[e-mail]>
> >>>>> Cc: [e-mail]
> >>>>> Cc: [e-mail]
> >>>>> Test-with: [e-mail]
> >>>>>
> >>>>> Christian König (1):
> >>>>>      dma-buf: Add dma_fence_array_for_each (v2)
> >>>>>
> >>>>> Jason Ekstrand (5):
> >>>>>      dma-buf: Add dma_resv_get_singleton (v6)
> >>>>>      dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
> >>>>>      dma-buf: Add an API for exporting sync files (v12)
> >>>>>      RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
> >>>>>      RFC: dma-buf: Add an API for importing sync files (v7)
> >>>>>
> >>>>>     Documentation/driver-api/dma-buf.rst |   8 ++
> >>>>>     drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
> >>>>>     drivers/dma-buf/dma-fence-array.c    |  27 +++++++
> >>>>>     drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
> >>>>>     include/linux/dma-fence-array.h      |  17 +++++
> >>>>>     include/linux/dma-resv.h             |   2 +
> >>>>>     include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
> >>>>>     7 files changed, 369 insertions(+), 1 deletion(-)
> >>>>>
> >> _______________________________________________
> >> mesa-dev mailing list
> >> [e-mail]
> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fmesa-dev&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=QxQDoUKzo57tmQxD0aEjPs8ATpCOBQiQ5W%2FDh8dbEqU%3D&amp;reserved=0
>

Daniel Vetter June 18, 2021, 2:31 p.m. UTC | #7

On Fri, Jun 18, 2021 at 11:15 AM Christian König
<[e-mail]> wrote:
>
> Am 17.06.21 um 21:58 schrieb Daniel Vetter:
> > On Thu, Jun 17, 2021 at 09:37:36AM +0200, Christian König wrote:
> >> [SNIP]
> >>> But, to the broader point, maybe?  I'm a little fuzzy on exactly where
> >>> i915 inserts and/or depends on fences.
> >>>
> >>>> When you combine that with complex drivers which use TTM and buffer
> >>>> moves underneath you can construct an information leak using this and
> >>>> give userspace access to memory which is allocated to the driver, but
> >>>> not yet initialized.
> >>>>
> >>>> This way you can leak things like page tables, passwords, kernel data
> >>>> etc... in large amounts to userspace and is an absolutely no-go for
> >>>> security.
> >>> Ugh...  Unfortunately, I'm really out of my depth on the implications
> >>> going on here but I think I see your point.
> >>>
> >>>> That's why I'm said we need to get this fixed before we upstream this
> >>>> patch set here and especially the driver change which is using that.
> >>> Well, i915 has had uAPI for a while to ignore fences.
> >> Yeah, exactly that's illegal.
> > You're a few years too late with closing that barn door. The following
> > drives have this concept
> > - i915
> > - msm
> > - etnaviv
> >
> > Because you can't write a competent vulkan driver without this.
>
> WHAT? ^^
>
> > This was discussed at absolute epic length in various xdcs iirc. We did ignore a
> > bit the vram/ttm/bo-moving problem because all the people present were
> > hacking on integrated gpu (see list above), but that just means we need to
> > treat the ttm_bo->moving fence properly.
>
> I should have visited more XDCs in the past, the problem is much larger
> than this.
>
> But I now start to understand what you are doing with that design and
> why it looks so messy to me, amdgpu is just currently the only driver
> which does Vulkan and complex memory management at the same time.
>
> >> At least the kernel internal fences like moving or clearing a buffer object
> >> needs to be taken into account before a driver is allowed to access a
> >> buffer.
> > Yes i915 needs to make sure it never ignores ttm_bo->moving.
>
> No, that is only the tip of the iceberg. See TTM for example also puts
> fences which drivers needs to wait for into the shared slots. Same thing
> for use cases like clear on release etc....
>
>  From my point of view the main purpose of the dma_resv object is to
> serve memory management, synchronization for command submission is just
> a secondary use case.
>
> And that drivers choose to ignore the exclusive fence is an absolutely
> no-go from a memory management and security point of view. Exclusive
> access means exclusive access. Ignoring that won't work.

Yeah, this is why I've been going all over the place about lifting
ttm_bo->moving to dma_resv. And also that I flat out don't trust your
audit, if you havent found these drivers then very clearly you didn't
audit much at all :-)

> The only thing which saved us so far is the fact that drivers doing this
> are not that complex.
>
> BTW: How does it even work? I mean then you would run into the same
> problem as amdgpu with its page table update fences, e.g. that your
> shared fences might signal before the exclusive one.

So we don't ignore any fences when we rip out the backing storage.

And yes there's currently a bug in all these drivers that if you set
both the "ignore implicit fences" and the "set the exclusive fence"
flag, then we just break this. Which is why I think we want to have a
dma_fence_add_shared_exclusive() helper extracted from your amdgpu
code, which we can then use everywhere to plug this.

> > For dma-buf this isn't actually a problem, because dma-buf are pinned. You
> > can't move them while other drivers are using them, hence there's not
> > actually a ttm_bo->moving fence we can ignore.
> >
> > p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw
> > these other drivers) need to change before they can do dynamic dma-buf.
> >
> >> Otherwise we have an information leak worth a CVE and that is certainly not
> >> something we want.
> > Because yes otherwise we get a CVE. But right now I don't think we have
> > one.
>
> Yeah, agree. But this is just because of coincident and not because of
> good engineering :)

Well the good news is that I think we're now talking slightly less
past each another than the past few weeks :-)

> > We do have a quite big confusion on what exactly the signaling ordering is
> > supposed to be between exclusive and the collective set of shared fences,
> > and there's some unifying that needs to happen here. But I think what
> > Jason implements here in the import ioctl is the most defensive version
> > possible, so really can't break any driver. It really works like you have
> > an ad-hoc gpu engine that does nothing itself, but waits for the current
> > exclusive fence and then sets the exclusive fence with its "CS" completion
> > fence.
> >
> > That's imo perfectly legit use-case.
>
> The use case is certainly legit, but I'm not sure if merging this at the
> moment is a good idea.
>
> Your note that drivers are already ignoring the exclusive fence in the
> dma_resv object was eye opening to me. And I now have the very strong
> feeling that the synchronization and the design of the dma_resv object
> is even more messy then I thought it is.
>
> To summarize we can be really lucky that it didn't blow up into our
> faces already.

I don't think there was that much luck involved (ok I did find a
possible bug in i915 already around cpu cache flushing) - for SoC the
exclusive slot in dma_resv really is only used for implicit sync and
nothing else. The fun only starts when you throw in pipelined backing
storage movement.

I guess this also explains why you just seemed to ignore me when I was
asking for a memory management exclusive fence for the p2p stuff, or
some other way to specifically handling movements (like ttm_bo->moving
or whatever it is). From my pov we clearly needed that to make p2p
dma-buf work well enough, mixing up the memory management exclusive
slot with the implicit sync exclusive slot never looked like a bright
idea to me.

I think at least we now have some understanding here.

> > Same for the export one. Waiting for a previous snapshot of implicit
> > fences is imo perfectly ok use-case and useful for compositors - client
> > might soon start more rendering, and on some drivers that always results
> > in the exclusive slot being set, so if you dont take a snapshot you
> > oversync real bad for your atomic flip.
>
> The export use case is unproblematic as far as I can see.
>
> >>> Those changes are years in the past.  If we have a real problem here (not sure on
> >>> that yet), then we'll have to figure out how to fix it without nuking
> >>> uAPI.
> >> Well, that was the basic idea of attaching flags to the fences in the
> >> dma_resv object.
> >>
> >> In other words you clearly denote when you have to wait for a fence before
> >> accessing a buffer or you cause a security issue.
> > Replied somewhere else, and I do kinda like the flag idea. But the problem
> > is we first need a ton more encapsulation and review of drivers before we
> > can change the internals. One thing at a time.
>
> Ok how should we then proceed?
>
> The large patch set I've send out to convert all users of the shared
> fence list to a for_each API is a step into the right direction I think,
> but there is still a bit more todo.

Yeah I had noted that as "need to review". But I think we should be
even more aggressive with encapsulation (at least where it doesn't
matter that much from a perf pov). Like my suggestion for dma_buf_poll
to not open-code the entire dance, but just use a snapshot thing. But
I'll check out next week what you cooked up with the iterator.

> > And yes for amdgpu this gets triple-hard because you both have the
> > ttm_bo->moving fence _and_ the current uapi of using fence ownership _and_
> > you need to figure out how to support vulkan properly with true opt-in
> > fencing.
>
> Well I have been pondering on that for a bit and I came to the
> conclusion that it is actually not a problem at all.
>
> See radeon, nouveau, msm etc... all implement functions that they don't
> wait for fences from the same timeline, context, engine. That amdgpu
> doesn't wait for fences from the same process can be seen as just a
> special case of this.

Oh that part isn't a fundamental design issue, internally you can do
whatever uapi you want. All I meant to say is because you currently
have this uapi, but not yet flags to control things more explicitly,
it's going to be more tricky code for amdgpu than for other drivers to
keep it all working. But not impossible, just more code.

> >   I'm pretty sure it's doable, I'm just not finding any time
> > anywhere to hack on these patches - too many other fires :-(
>
> Well I'm here. Let's just agree on the direction and I can do the coding.
>
> What I need help with is all the auditing. For example I still haven't
> wrapped my head around how i915 does the synchronization.

Yeah the auditing is annoying, and i915 is definitely butchered in
some ways. I'm currently screaming at silly bugs in the i915
relocation code (it was tuned a bit more than makes sense, and
acquired a pile of bugs due to that), but after that I should have
time to refresh the old series. That one audits the setting of
dma_resv fences fully, and I half-started with the
dependency/scheduler side too. There's going to be a few fixed needed
there.
-Daniel

> Best regards,
> Christian.
>
> >
> > Cheers, Daniel
> >
> >> Christian.
> >>
> >>> --Jason
> >>>
> >>>
> >>>> Regards,
> >>>> Christian.
> >>>>
> >>>> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
> >>>>> Modern userspace APIs like Vulkan are built on an explicit
> >>>>> synchronization model.  This doesn't always play nicely with the
> >>>>> implicit synchronization used in the kernel and assumed by X11 and
> >>>>> Wayland.  The client -> compositor half of the synchronization isn't too
> >>>>> bad, at least on intel, because we can control whether or not i915
> >>>>> synchronizes on the buffer and whether or not it's considered written.
> >>>>>
> >>>>> The harder part is the compositor -> client synchronization when we get
> >>>>> the buffer back from the compositor.  We're required to be able to
> >>>>> provide the client with a VkSemaphore and VkFence representing the point
> >>>>> in time where the window system (compositor and/or display) finished
> >>>>> using the buffer.  With current APIs, it's very hard to do this in such
> >>>>> a way that we don't get confused by the Vulkan driver's access of the
> >>>>> buffer.  In particular, once we tell the kernel that we're rendering to
> >>>>> the buffer again, any CPU waits on the buffer or GPU dependencies will
> >>>>> wait on some of the client rendering and not just the compositor.
> >>>>>
> >>>>> This new IOCTL solves this problem by allowing us to get a snapshot of
> >>>>> the implicit synchronization state of a given dma-buf in the form of a
> >>>>> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
> >>>>> instead of CPU waiting directly, it encapsulates the wait operation, at
> >>>>> the current moment in time, in a sync_file so we can check/wait on it
> >>>>> later.  As long as the Vulkan driver does the sync_file export from the
> >>>>> dma-buf before we re-introduce it for rendering, it will only contain
> >>>>> fences from the compositor or display.  This allows to accurately turn
> >>>>> it into a VkFence or VkSemaphore without any over- synchronization.
> >>>>>
> >>>>> This patch series actually contains two new ioctls.  There is the export
> >>>>> one mentioned above as well as an RFC for an import ioctl which provides
> >>>>> the other half.  The intention is to land the export ioctl since it seems
> >>>>> like there's no real disagreement on that one.  The import ioctl, however,
> >>>>> has a lot of debate around it so it's intended to be RFC-only for now.
> >>>>>
> >>>>> Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=TAFUHFCSFcfrP7bjkBtVin4VX2vC6OakwbrqwlZOW8c%3D&amp;reserved=0
> >>>>> IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=lbn%2B81KXds9pYnFUYWi9hzLNP3PLKij4RVjV97UyZ3s%3D&amp;reserved=0
> >>>>>
> >>>>> v10 (Jason Ekstrand, Daniel Vetter):
> >>>>>     - Add reviews/acks
> >>>>>     - Add a patch to rename _rcu to _unlocked
> >>>>>     - Split things better so import is clearly RFC status
> >>>>>
> >>>>> v11 (Daniel Vetter):
> >>>>>     - Add more CCs to try and get maintainers
> >>>>>     - Add a patch to document DMA_BUF_IOCTL_SYNC
> >>>>>     - Generally better docs
> >>>>>     - Use separate structs for import/export (easier to document)
> >>>>>     - Fix an issue in the import patch
> >>>>>
> >>>>> v12 (Daniel Vetter):
> >>>>>     - Better docs for DMA_BUF_IOCTL_SYNC
> >>>>>
> >>>>> v12 (Christian König):
> >>>>>     - Drop the rename patch in favor of Christian's series
> >>>>>     - Add a comment to the commit message for the dma-buf sync_file export
> >>>>>       ioctl saying why we made it an ioctl on dma-buf
> >>>>>
> >>>>> Cc: Christian König <[e-mail]>
> >>>>> Cc: Michel Dänzer <[e-mail]>
> >>>>> Cc: Dave Airlie <[e-mail]>
> >>>>> Cc: Bas Nieuwenhuizen <[e-mail]>
> >>>>> Cc: Daniel Stone <[e-mail]>
> >>>>> Cc: [e-mail]
> >>>>> Cc: [e-mail]
> >>>>> Test-with: [e-mail]
> >>>>>
> >>>>> Christian König (1):
> >>>>>      dma-buf: Add dma_fence_array_for_each (v2)
> >>>>>
> >>>>> Jason Ekstrand (5):
> >>>>>      dma-buf: Add dma_resv_get_singleton (v6)
> >>>>>      dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
> >>>>>      dma-buf: Add an API for exporting sync files (v12)
> >>>>>      RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
> >>>>>      RFC: dma-buf: Add an API for importing sync files (v7)
> >>>>>
> >>>>>     Documentation/driver-api/dma-buf.rst |   8 ++
> >>>>>     drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
> >>>>>     drivers/dma-buf/dma-fence-array.c    |  27 +++++++
> >>>>>     drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
> >>>>>     include/linux/dma-fence-array.h      |  17 +++++
> >>>>>     include/linux/dma-resv.h             |   2 +
> >>>>>     include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
> >>>>>     7 files changed, 369 insertions(+), 1 deletion(-)
> >>>>>
> >> _______________________________________________
> >> mesa-dev mailing list
> >> [e-mail]
> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fmesa-dev&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7Cf8e28d7c4683432bf24008d931ca5a63%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637595567453821101%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=QxQDoUKzo57tmQxD0aEjPs8ATpCOBQiQ5W%2FDh8dbEqU%3D&amp;reserved=0
>

Christian König June 18, 2021, 2:42 p.m. UTC | #8

Am 18.06.21 um 16:31 schrieb Daniel Vetter:
> [SNIP]
>> And that drivers choose to ignore the exclusive fence is an absolutely
>> no-go from a memory management and security point of view. Exclusive
>> access means exclusive access. Ignoring that won't work.
> Yeah, this is why I've been going all over the place about lifting
> ttm_bo->moving to dma_resv. And also that I flat out don't trust your
> audit, if you havent found these drivers then very clearly you didn't
> audit much at all :-)

I just didn't though that anybody could be so stupid to allow such a 
thing in.

>> The only thing which saved us so far is the fact that drivers doing this
>> are not that complex.
>>
>> BTW: How does it even work? I mean then you would run into the same
>> problem as amdgpu with its page table update fences, e.g. that your
>> shared fences might signal before the exclusive one.
> So we don't ignore any fences when we rip out the backing storage.
>
> And yes there's currently a bug in all these drivers that if you set
> both the "ignore implicit fences" and the "set the exclusive fence"
> flag, then we just break this. Which is why I think we want to have a
> dma_fence_add_shared_exclusive() helper extracted from your amdgpu
> code, which we can then use everywhere to plug this.

Daniel are you realizing what you are talking about here? Does that also 
apply for imported DMA-bufs?

If yes than that is a security hole you can push an elephant through.

Can you point me to the code using that?

>>> For dma-buf this isn't actually a problem, because dma-buf are pinned. You
>>> can't move them while other drivers are using them, hence there's not
>>> actually a ttm_bo->moving fence we can ignore.
>>>
>>> p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw
>>> these other drivers) need to change before they can do dynamic dma-buf.
>>>
>>>> Otherwise we have an information leak worth a CVE and that is certainly not
>>>> something we want.
>>> Because yes otherwise we get a CVE. But right now I don't think we have
>>> one.
>> Yeah, agree. But this is just because of coincident and not because of
>> good engineering :)
> Well the good news is that I think we're now talking slightly less
> past each another than the past few weeks :-)
>
>>> We do have a quite big confusion on what exactly the signaling ordering is
>>> supposed to be between exclusive and the collective set of shared fences,
>>> and there's some unifying that needs to happen here. But I think what
>>> Jason implements here in the import ioctl is the most defensive version
>>> possible, so really can't break any driver. It really works like you have
>>> an ad-hoc gpu engine that does nothing itself, but waits for the current
>>> exclusive fence and then sets the exclusive fence with its "CS" completion
>>> fence.
>>>
>>> That's imo perfectly legit use-case.
>> The use case is certainly legit, but I'm not sure if merging this at the
>> moment is a good idea.
>>
>> Your note that drivers are already ignoring the exclusive fence in the
>> dma_resv object was eye opening to me. And I now have the very strong
>> feeling that the synchronization and the design of the dma_resv object
>> is even more messy then I thought it is.
>>
>> To summarize we can be really lucky that it didn't blow up into our
>> faces already.
> I don't think there was that much luck involved (ok I did find a
> possible bug in i915 already around cpu cache flushing) - for SoC the
> exclusive slot in dma_resv really is only used for implicit sync and
> nothing else. The fun only starts when you throw in pipelined backing
> storage movement.
>
> I guess this also explains why you just seemed to ignore me when I was
> asking for a memory management exclusive fence for the p2p stuff, or
> some other way to specifically handling movements (like ttm_bo->moving
> or whatever it is). From my pov we clearly needed that to make p2p
> dma-buf work well enough, mixing up the memory management exclusive
> slot with the implicit sync exclusive slot never looked like a bright
> idea to me.
>
> I think at least we now have some understanding here.

Well to be honest what you have just told me means that i915 is 
seriously broken.

Ignoring the exclusive fence on an imported DMA-buf is an absolutely 
*NO-GO* even without P2P.

What you have stitched together here allows anybody to basically read 
any memory on the system with both i915 and nouveau, radeon or amdgpu.

We need to fix that ASAP!

Regards,
Christian.

>>> Same for the export one. Waiting for a previous snapshot of implicit
>>> fences is imo perfectly ok use-case and useful for compositors - client
>>> might soon start more rendering, and on some drivers that always results
>>> in the exclusive slot being set, so if you dont take a snapshot you
>>> oversync real bad for your atomic flip.
>> The export use case is unproblematic as far as I can see.
>>
>>>>> Those changes are years in the past.  If we have a real problem here (not sure on
>>>>> that yet), then we'll have to figure out how to fix it without nuking
>>>>> uAPI.
>>>> Well, that was the basic idea of attaching flags to the fences in the
>>>> dma_resv object.
>>>>
>>>> In other words you clearly denote when you have to wait for a fence before
>>>> accessing a buffer or you cause a security issue.
>>> Replied somewhere else, and I do kinda like the flag idea. But the problem
>>> is we first need a ton more encapsulation and review of drivers before we
>>> can change the internals. One thing at a time.
>> Ok how should we then proceed?
>>
>> The large patch set I've send out to convert all users of the shared
>> fence list to a for_each API is a step into the right direction I think,
>> but there is still a bit more todo.
> Yeah I had noted that as "need to review". But I think we should be
> even more aggressive with encapsulation (at least where it doesn't
> matter that much from a perf pov). Like my suggestion for dma_buf_poll
> to not open-code the entire dance, but just use a snapshot thing. But
> I'll check out next week what you cooked up with the iterator.
>
>>> And yes for amdgpu this gets triple-hard because you both have the
>>> ttm_bo->moving fence _and_ the current uapi of using fence ownership _and_
>>> you need to figure out how to support vulkan properly with true opt-in
>>> fencing.
>> Well I have been pondering on that for a bit and I came to the
>> conclusion that it is actually not a problem at all.
>>
>> See radeon, nouveau, msm etc... all implement functions that they don't
>> wait for fences from the same timeline, context, engine. That amdgpu
>> doesn't wait for fences from the same process can be seen as just a
>> special case of this.
> Oh that part isn't a fundamental design issue, internally you can do
> whatever uapi you want. All I meant to say is because you currently
> have this uapi, but not yet flags to control things more explicitly,
> it's going to be more tricky code for amdgpu than for other drivers to
> keep it all working. But not impossible, just more code.
>
>>>    I'm pretty sure it's doable, I'm just not finding any time
>>> anywhere to hack on these patches - too many other fires :-(
>> Well I'm here. Let's just agree on the direction and I can do the coding.
>>
>> What I need help with is all the auditing. For example I still haven't
>> wrapped my head around how i915 does the synchronization.
> Yeah the auditing is annoying, and i915 is definitely butchered in
> some ways. I'm currently screaming at silly bugs in the i915
> relocation code (it was tuned a bit more than makes sense, and
> acquired a pile of bugs due to that), but after that I should have
> time to refresh the old series. That one audits the setting of
> dma_resv fences fully, and I half-started with the
> dependency/scheduler side too. There's going to be a few fixed needed
> there.
> -Daniel
>
>> Best regards,
>> Christian.
>>
>>> Cheers, Daniel
>>>
>>>> Christian.
>>>>
>>>>> --Jason
>>>>>
>>>>>
>>>>>> Regards,
>>>>>> Christian.
>>>>>>
>>>>>> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
>>>>>>> Modern userspace APIs like Vulkan are built on an explicit
>>>>>>> synchronization model.  This doesn't always play nicely with the
>>>>>>> implicit synchronization used in the kernel and assumed by X11 and
>>>>>>> Wayland.  The client -> compositor half of the synchronization isn't too
>>>>>>> bad, at least on intel, because we can control whether or not i915
>>>>>>> synchronizes on the buffer and whether or not it's considered written.
>>>>>>>
>>>>>>> The harder part is the compositor -> client synchronization when we get
>>>>>>> the buffer back from the compositor.  We're required to be able to
>>>>>>> provide the client with a VkSemaphore and VkFence representing the point
>>>>>>> in time where the window system (compositor and/or display) finished
>>>>>>> using the buffer.  With current APIs, it's very hard to do this in such
>>>>>>> a way that we don't get confused by the Vulkan driver's access of the
>>>>>>> buffer.  In particular, once we tell the kernel that we're rendering to
>>>>>>> the buffer again, any CPU waits on the buffer or GPU dependencies will
>>>>>>> wait on some of the client rendering and not just the compositor.
>>>>>>>
>>>>>>> This new IOCTL solves this problem by allowing us to get a snapshot of
>>>>>>> the implicit synchronization state of a given dma-buf in the form of a
>>>>>>> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
>>>>>>> instead of CPU waiting directly, it encapsulates the wait operation, at
>>>>>>> the current moment in time, in a sync_file so we can check/wait on it
>>>>>>> later.  As long as the Vulkan driver does the sync_file export from the
>>>>>>> dma-buf before we re-introduce it for rendering, it will only contain
>>>>>>> fences from the compositor or display.  This allows to accurately turn
>>>>>>> it into a VkFence or VkSemaphore without any over- synchronization.
>>>>>>>
>>>>>>> This patch series actually contains two new ioctls.  There is the export
>>>>>>> one mentioned above as well as an RFC for an import ioctl which provides
>>>>>>> the other half.  The intention is to land the export ioctl since it seems
>>>>>>> like there's no real disagreement on that one.  The import ioctl, however,
>>>>>>> has a lot of debate around it so it's intended to be RFC-only for now.
>>>>>>>
>>>>>>> Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&data=04%7C01%7Cchristian.koenig%40amd.com%7C841231ea3c6e43f2141208d93265bfe7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637596234879170817%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=kDEQr7d7fbba6938tZoERXN6hlOyKMdVjgY5U4ux4iI%3D&reserved=0
>>>>>>> IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&data=04%7C01%7Cchristian.koenig%40amd.com%7C841231ea3c6e43f2141208d93265bfe7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637596234879170817%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=MM5c55nspWbUxzajqBv1iNHdz2TYAImG2XPOSnDE6qQ%3D&reserved=0
>>>>>>>
>>>>>>> v10 (Jason Ekstrand, Daniel Vetter):
>>>>>>>      - Add reviews/acks
>>>>>>>      - Add a patch to rename _rcu to _unlocked
>>>>>>>      - Split things better so import is clearly RFC status
>>>>>>>
>>>>>>> v11 (Daniel Vetter):
>>>>>>>      - Add more CCs to try and get maintainers
>>>>>>>      - Add a patch to document DMA_BUF_IOCTL_SYNC
>>>>>>>      - Generally better docs
>>>>>>>      - Use separate structs for import/export (easier to document)
>>>>>>>      - Fix an issue in the import patch
>>>>>>>
>>>>>>> v12 (Daniel Vetter):
>>>>>>>      - Better docs for DMA_BUF_IOCTL_SYNC
>>>>>>>
>>>>>>> v12 (Christian König):
>>>>>>>      - Drop the rename patch in favor of Christian's series
>>>>>>>      - Add a comment to the commit message for the dma-buf sync_file export
>>>>>>>        ioctl saying why we made it an ioctl on dma-buf
>>>>>>>
>>>>>>> Cc: Christian König <[e-mail]>
>>>>>>> Cc: Michel Dänzer <[e-mail]>
>>>>>>> Cc: Dave Airlie <[e-mail]>
>>>>>>> Cc: Bas Nieuwenhuizen <[e-mail]>
>>>>>>> Cc: Daniel Stone <[e-mail]>
>>>>>>> Cc: [e-mail]
>>>>>>> Cc: [e-mail]
>>>>>>> Test-with: [e-mail]
>>>>>>>
>>>>>>> Christian König (1):
>>>>>>>       dma-buf: Add dma_fence_array_for_each (v2)
>>>>>>>
>>>>>>> Jason Ekstrand (5):
>>>>>>>       dma-buf: Add dma_resv_get_singleton (v6)
>>>>>>>       dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
>>>>>>>       dma-buf: Add an API for exporting sync files (v12)
>>>>>>>       RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
>>>>>>>       RFC: dma-buf: Add an API for importing sync files (v7)
>>>>>>>
>>>>>>>      Documentation/driver-api/dma-buf.rst |   8 ++
>>>>>>>      drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
>>>>>>>      drivers/dma-buf/dma-fence-array.c    |  27 +++++++
>>>>>>>      drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
>>>>>>>      include/linux/dma-fence-array.h      |  17 +++++
>>>>>>>      include/linux/dma-resv.h             |   2 +
>>>>>>>      include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
>>>>>>>      7 files changed, 369 insertions(+), 1 deletion(-)
>>>>>>>
>>>> _______________________________________________
>>>> mesa-dev mailing list
>>>> [e-mail]
>>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fmesa-dev&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7C841231ea3c6e43f2141208d93265bfe7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637596234879170817%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=iA%2B3ZezHwlfjMMpkf3bVX8M0HUk3lVDm%2F476G1S8yZI%3D&amp;reserved=0
>

Daniel Vetter June 18, 2021, 3:17 p.m. UTC | #9

On Fri, Jun 18, 2021 at 4:42 PM Christian König
<[e-mail]> wrote:
>
> Am 18.06.21 um 16:31 schrieb Daniel Vetter:
> > [SNIP]
> >> And that drivers choose to ignore the exclusive fence is an absolutely
> >> no-go from a memory management and security point of view. Exclusive
> >> access means exclusive access. Ignoring that won't work.
> > Yeah, this is why I've been going all over the place about lifting
> > ttm_bo->moving to dma_resv. And also that I flat out don't trust your
> > audit, if you havent found these drivers then very clearly you didn't
> > audit much at all :-)
>
> I just didn't though that anybody could be so stupid to allow such a
> thing in.
>
> >> The only thing which saved us so far is the fact that drivers doing this
> >> are not that complex.
> >>
> >> BTW: How does it even work? I mean then you would run into the same
> >> problem as amdgpu with its page table update fences, e.g. that your
> >> shared fences might signal before the exclusive one.
> > So we don't ignore any fences when we rip out the backing storage.
> >
> > And yes there's currently a bug in all these drivers that if you set
> > both the "ignore implicit fences" and the "set the exclusive fence"
> > flag, then we just break this. Which is why I think we want to have a
> > dma_fence_add_shared_exclusive() helper extracted from your amdgpu
> > code, which we can then use everywhere to plug this.
>
> Daniel are you realizing what you are talking about here? Does that also
> apply for imported DMA-bufs?
>
> If yes than that is a security hole you can push an elephant through.
>
> Can you point me to the code using that?
>
> >>> For dma-buf this isn't actually a problem, because dma-buf are pinned. You
> >>> can't move them while other drivers are using them, hence there's not
> >>> actually a ttm_bo->moving fence we can ignore.
> >>>
> >>> p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw
> >>> these other drivers) need to change before they can do dynamic dma-buf.
> >>>
> >>>> Otherwise we have an information leak worth a CVE and that is certainly not
> >>>> something we want.
> >>> Because yes otherwise we get a CVE. But right now I don't think we have
> >>> one.
> >> Yeah, agree. But this is just because of coincident and not because of
> >> good engineering :)
> > Well the good news is that I think we're now talking slightly less
> > past each another than the past few weeks :-)
> >
> >>> We do have a quite big confusion on what exactly the signaling ordering is
> >>> supposed to be between exclusive and the collective set of shared fences,
> >>> and there's some unifying that needs to happen here. But I think what
> >>> Jason implements here in the import ioctl is the most defensive version
> >>> possible, so really can't break any driver. It really works like you have
> >>> an ad-hoc gpu engine that does nothing itself, but waits for the current
> >>> exclusive fence and then sets the exclusive fence with its "CS" completion
> >>> fence.
> >>>
> >>> That's imo perfectly legit use-case.
> >> The use case is certainly legit, but I'm not sure if merging this at the
> >> moment is a good idea.
> >>
> >> Your note that drivers are already ignoring the exclusive fence in the
> >> dma_resv object was eye opening to me. And I now have the very strong
> >> feeling that the synchronization and the design of the dma_resv object
> >> is even more messy then I thought it is.
> >>
> >> To summarize we can be really lucky that it didn't blow up into our
> >> faces already.
> > I don't think there was that much luck involved (ok I did find a
> > possible bug in i915 already around cpu cache flushing) - for SoC the
> > exclusive slot in dma_resv really is only used for implicit sync and
> > nothing else. The fun only starts when you throw in pipelined backing
> > storage movement.
> >
> > I guess this also explains why you just seemed to ignore me when I was
> > asking for a memory management exclusive fence for the p2p stuff, or
> > some other way to specifically handling movements (like ttm_bo->moving
> > or whatever it is). From my pov we clearly needed that to make p2p
> > dma-buf work well enough, mixing up the memory management exclusive
> > slot with the implicit sync exclusive slot never looked like a bright
> > idea to me.
> >
> > I think at least we now have some understanding here.
>
> Well to be honest what you have just told me means that i915 is
> seriously broken.
>
> Ignoring the exclusive fence on an imported DMA-buf is an absolutely
> *NO-GO* even without P2P.
>
> What you have stitched together here allows anybody to basically read
> any memory on the system with both i915 and nouveau, radeon or amdgpu.
>
> We need to fix that ASAP!

Ignoring _all_ fences is officially ok for pinned dma-buf. This is
what v4l does. Aside from it's definitely not just i915 that does this
even on the drm side, we have a few more drivers nowadays.

The rules are that after you've called dma_buf_map_attachment the
memory exists, and is _not_ allowed to move, or be uncleared data, or
anything else. This must be guaranteed until dma_buf_unmap_attachment
is called.

Also drivers are not required to even set a dma_fence in the dma_resv
object for their dma access. Again v4l works like this by design, but
we've had plenty of drivers who totally ignored dma_resv beforehand
too.

So if there's a problem, I think you first need to explain what it is.
Also if you wonder how we got here, that part is easy: dma-buf
predates dma-resv extraction from ttm by quite some time (years even
iirc). So the og dma-buf rules really are "fences don't matter, do
whatever you feel with them". Well you're not allowed to just remove
them if their not your own, since that could break other drivers :-)

If amdgpu now e.g. pipelines the clearing/moving of
dma_buf_map_attachment behind an exclusive fence, that would be
broken. That is _only_ allowed if both exporter and all importers are
dynamic. I don't think you've done that, but if that's the case then
the dma_buf_ops->pin callback would need to have a
dma_fence_wait(exclusive_fence) or something like that to plug that
gap.

If it's something else, then please walk me through the scenario
because I'm not seeing a problem here.
-Daniel

> Regards,
> Christian.
>
> >>> Same for the export one. Waiting for a previous snapshot of implicit
> >>> fences is imo perfectly ok use-case and useful for compositors - client
> >>> might soon start more rendering, and on some drivers that always results
> >>> in the exclusive slot being set, so if you dont take a snapshot you
> >>> oversync real bad for your atomic flip.
> >> The export use case is unproblematic as far as I can see.
> >>
> >>>>> Those changes are years in the past.  If we have a real problem here (not sure on
> >>>>> that yet), then we'll have to figure out how to fix it without nuking
> >>>>> uAPI.
> >>>> Well, that was the basic idea of attaching flags to the fences in the
> >>>> dma_resv object.
> >>>>
> >>>> In other words you clearly denote when you have to wait for a fence before
> >>>> accessing a buffer or you cause a security issue.
> >>> Replied somewhere else, and I do kinda like the flag idea. But the problem
> >>> is we first need a ton more encapsulation and review of drivers before we
> >>> can change the internals. One thing at a time.
> >> Ok how should we then proceed?
> >>
> >> The large patch set I've send out to convert all users of the shared
> >> fence list to a for_each API is a step into the right direction I think,
> >> but there is still a bit more todo.
> > Yeah I had noted that as "need to review". But I think we should be
> > even more aggressive with encapsulation (at least where it doesn't
> > matter that much from a perf pov). Like my suggestion for dma_buf_poll
> > to not open-code the entire dance, but just use a snapshot thing. But
> > I'll check out next week what you cooked up with the iterator.
> >
> >>> And yes for amdgpu this gets triple-hard because you both have the
> >>> ttm_bo->moving fence _and_ the current uapi of using fence ownership _and_
> >>> you need to figure out how to support vulkan properly with true opt-in
> >>> fencing.
> >> Well I have been pondering on that for a bit and I came to the
> >> conclusion that it is actually not a problem at all.
> >>
> >> See radeon, nouveau, msm etc... all implement functions that they don't
> >> wait for fences from the same timeline, context, engine. That amdgpu
> >> doesn't wait for fences from the same process can be seen as just a
> >> special case of this.
> > Oh that part isn't a fundamental design issue, internally you can do
> > whatever uapi you want. All I meant to say is because you currently
> > have this uapi, but not yet flags to control things more explicitly,
> > it's going to be more tricky code for amdgpu than for other drivers to
> > keep it all working. But not impossible, just more code.
> >
> >>>    I'm pretty sure it's doable, I'm just not finding any time
> >>> anywhere to hack on these patches - too many other fires :-(
> >> Well I'm here. Let's just agree on the direction and I can do the coding.
> >>
> >> What I need help with is all the auditing. For example I still haven't
> >> wrapped my head around how i915 does the synchronization.
> > Yeah the auditing is annoying, and i915 is definitely butchered in
> > some ways. I'm currently screaming at silly bugs in the i915
> > relocation code (it was tuned a bit more than makes sense, and
> > acquired a pile of bugs due to that), but after that I should have
> > time to refresh the old series. That one audits the setting of
> > dma_resv fences fully, and I half-started with the
> > dependency/scheduler side too. There's going to be a few fixed needed
> > there.
> > -Daniel
> >
> >> Best regards,
> >> Christian.
> >>
> >>> Cheers, Daniel
> >>>
> >>>> Christian.
> >>>>
> >>>>> --Jason
> >>>>>
> >>>>>
> >>>>>> Regards,
> >>>>>> Christian.
> >>>>>>
> >>>>>> Am 10.06.21 um 23:09 schrieb Jason Ekstrand:
> >>>>>>> Modern userspace APIs like Vulkan are built on an explicit
> >>>>>>> synchronization model.  This doesn't always play nicely with the
> >>>>>>> implicit synchronization used in the kernel and assumed by X11 and
> >>>>>>> Wayland.  The client -> compositor half of the synchronization isn't too
> >>>>>>> bad, at least on intel, because we can control whether or not i915
> >>>>>>> synchronizes on the buffer and whether or not it's considered written.
> >>>>>>>
> >>>>>>> The harder part is the compositor -> client synchronization when we get
> >>>>>>> the buffer back from the compositor.  We're required to be able to
> >>>>>>> provide the client with a VkSemaphore and VkFence representing the point
> >>>>>>> in time where the window system (compositor and/or display) finished
> >>>>>>> using the buffer.  With current APIs, it's very hard to do this in such
> >>>>>>> a way that we don't get confused by the Vulkan driver's access of the
> >>>>>>> buffer.  In particular, once we tell the kernel that we're rendering to
> >>>>>>> the buffer again, any CPU waits on the buffer or GPU dependencies will
> >>>>>>> wait on some of the client rendering and not just the compositor.
> >>>>>>>
> >>>>>>> This new IOCTL solves this problem by allowing us to get a snapshot of
> >>>>>>> the implicit synchronization state of a given dma-buf in the form of a
> >>>>>>> sync file.  It's effectively the same as a poll() or I915_GEM_WAIT only,
> >>>>>>> instead of CPU waiting directly, it encapsulates the wait operation, at
> >>>>>>> the current moment in time, in a sync_file so we can check/wait on it
> >>>>>>> later.  As long as the Vulkan driver does the sync_file export from the
> >>>>>>> dma-buf before we re-introduce it for rendering, it will only contain
> >>>>>>> fences from the compositor or display.  This allows to accurately turn
> >>>>>>> it into a VkFence or VkSemaphore without any over- synchronization.
> >>>>>>>
> >>>>>>> This patch series actually contains two new ioctls.  There is the export
> >>>>>>> one mentioned above as well as an RFC for an import ioctl which provides
> >>>>>>> the other half.  The intention is to land the export ioctl since it seems
> >>>>>>> like there's no real disagreement on that one.  The import ioctl, however,
> >>>>>>> has a lot of debate around it so it's intended to be RFC-only for now.
> >>>>>>>
> >>>>>>> Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7C841231ea3c6e43f2141208d93265bfe7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637596234879170817%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=kDEQr7d7fbba6938tZoERXN6hlOyKMdVjgY5U4ux4iI%3D&amp;reserved=0
> >>>>>>> IGT tests: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F90490%2F&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7C841231ea3c6e43f2141208d93265bfe7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637596234879170817%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=MM5c55nspWbUxzajqBv1iNHdz2TYAImG2XPOSnDE6qQ%3D&amp;reserved=0
> >>>>>>>
> >>>>>>> v10 (Jason Ekstrand, Daniel Vetter):
> >>>>>>>      - Add reviews/acks
> >>>>>>>      - Add a patch to rename _rcu to _unlocked
> >>>>>>>      - Split things better so import is clearly RFC status
> >>>>>>>
> >>>>>>> v11 (Daniel Vetter):
> >>>>>>>      - Add more CCs to try and get maintainers
> >>>>>>>      - Add a patch to document DMA_BUF_IOCTL_SYNC
> >>>>>>>      - Generally better docs
> >>>>>>>      - Use separate structs for import/export (easier to document)
> >>>>>>>      - Fix an issue in the import patch
> >>>>>>>
> >>>>>>> v12 (Daniel Vetter):
> >>>>>>>      - Better docs for DMA_BUF_IOCTL_SYNC
> >>>>>>>
> >>>>>>> v12 (Christian König):
> >>>>>>>      - Drop the rename patch in favor of Christian's series
> >>>>>>>      - Add a comment to the commit message for the dma-buf sync_file export
> >>>>>>>        ioctl saying why we made it an ioctl on dma-buf
> >>>>>>>
> >>>>>>> Cc: Christian König <[e-mail]>
> >>>>>>> Cc: Michel Dänzer <[e-mail]>
> >>>>>>> Cc: Dave Airlie <[e-mail]>
> >>>>>>> Cc: Bas Nieuwenhuizen <[e-mail]>
> >>>>>>> Cc: Daniel Stone <[e-mail]>
> >>>>>>> Cc: [e-mail]
> >>>>>>> Cc: [e-mail]
> >>>>>>> Test-with: [e-mail]
> >>>>>>>
> >>>>>>> Christian König (1):
> >>>>>>>       dma-buf: Add dma_fence_array_for_each (v2)
> >>>>>>>
> >>>>>>> Jason Ekstrand (5):
> >>>>>>>       dma-buf: Add dma_resv_get_singleton (v6)
> >>>>>>>       dma-buf: Document DMA_BUF_IOCTL_SYNC (v2)
> >>>>>>>       dma-buf: Add an API for exporting sync files (v12)
> >>>>>>>       RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
> >>>>>>>       RFC: dma-buf: Add an API for importing sync files (v7)
> >>>>>>>
> >>>>>>>      Documentation/driver-api/dma-buf.rst |   8 ++
> >>>>>>>      drivers/dma-buf/dma-buf.c            | 103 +++++++++++++++++++++++++
> >>>>>>>      drivers/dma-buf/dma-fence-array.c    |  27 +++++++
> >>>>>>>      drivers/dma-buf/dma-resv.c           | 110 +++++++++++++++++++++++++++
> >>>>>>>      include/linux/dma-fence-array.h      |  17 +++++
> >>>>>>>      include/linux/dma-resv.h             |   2 +
> >>>>>>>      include/uapi/linux/dma-buf.h         | 103 ++++++++++++++++++++++++-
> >>>>>>>      7 files changed, 369 insertions(+), 1 deletion(-)
> >>>>>>>
> >>>> _______________________________________________
> >>>> mesa-dev mailing list
> >>>> [e-mail]
> >>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fmesa-dev&amp;data=04%7C01%7Cchristian.koenig%40amd.com%7C841231ea3c6e43f2141208d93265bfe7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637596234879170817%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=iA%2B3ZezHwlfjMMpkf3bVX8M0HUk3lVDm%2F476G1S8yZI%3D&amp;reserved=0
> >
>

Christian König June 18, 2021, 4:42 p.m. UTC | #10

Am 18.06.21 um 17:17 schrieb Daniel Vetter:
> [SNIP]
> Ignoring _all_ fences is officially ok for pinned dma-buf. This is
> what v4l does. Aside from it's definitely not just i915 that does this
> even on the drm side, we have a few more drivers nowadays.

No it seriously isn't. If drivers are doing this they are more than broken.

See the comment in dma-resv.h

  * Based on bo.c which bears the following copyright notice,
  * but is dual licensed:
....


The handling in ttm_bo.c is and always was that the exclusive fence is 
used for buffer moves.

As I said multiple times now the *MAIN* purpose of the dma_resv object 
is memory management and *NOT* synchronization.

Those restrictions come from the original design of TTM where the 
dma_resv object originated from.

The resulting consequences are that:

a) If you access the buffer without waiting for the exclusive fence you 
run into a potential information leak.
     We kind of let that slip for V4L since they only access the buffers 
for writes, so you can't do any harm there.

b) If you overwrite the exclusive fence with a new one without waiting 
for the old one to signal you open up the possibility for userspace to 
access freed up memory.
     This is a complete show stopper since it means that taking over the 
system is just a typing exercise.


What you have done by allowing this in is ripping open a major security 
hole for any DMA-buf import in i915 from all TTM based driver.

This needs to be fixed ASAP, either by waiting in i915 and all other 
drivers doing this for the exclusive fence while importing a DMA-buf or 
by marking i915 and all other drivers as broken.

Sorry, but if you allowed that in you seriously have no idea what you 
are talking about here and where all of this originated from.

Regards,
Christian.

Daniel Vetter June 18, 2021, 5:20 p.m. UTC | #11

On Fri, Jun 18, 2021 at 6:43 PM Christian König
<[e-mail]> wrote:
>
> Am 18.06.21 um 17:17 schrieb Daniel Vetter:
> > [SNIP]
> > Ignoring _all_ fences is officially ok for pinned dma-buf. This is
> > what v4l does. Aside from it's definitely not just i915 that does this
> > even on the drm side, we have a few more drivers nowadays.
>
> No it seriously isn't. If drivers are doing this they are more than broken.
>
> See the comment in dma-resv.h
>
>   * Based on bo.c which bears the following copyright notice,
>   * but is dual licensed:
> ....
>
>
> The handling in ttm_bo.c is and always was that the exclusive fence is
> used for buffer moves.
>
> As I said multiple times now the *MAIN* purpose of the dma_resv object
> is memory management and *NOT* synchronization.
>
> Those restrictions come from the original design of TTM where the
> dma_resv object originated from.
>
> The resulting consequences are that:
>
> a) If you access the buffer without waiting for the exclusive fence you
> run into a potential information leak.
>      We kind of let that slip for V4L since they only access the buffers
> for writes, so you can't do any harm there.
>
> b) If you overwrite the exclusive fence with a new one without waiting
> for the old one to signal you open up the possibility for userspace to
> access freed up memory.
>      This is a complete show stopper since it means that taking over the
> system is just a typing exercise.
>
>
> What you have done by allowing this in is ripping open a major security
> hole for any DMA-buf import in i915 from all TTM based driver.
>
> This needs to be fixed ASAP, either by waiting in i915 and all other
> drivers doing this for the exclusive fence while importing a DMA-buf or
> by marking i915 and all other drivers as broken.
>
> Sorry, but if you allowed that in you seriously have no idea what you
> are talking about here and where all of this originated from.

Dude, get a grip, seriously. dma-buf landed in 2011

commit d15bd7ee445d0702ad801fdaece348fdb79e6581
Author: Sumit Semwal <[e-mail]>
Date:   Mon Dec 26 14:53:15 2011 +0530

   dma-buf: Introduce dma buffer sharing mechanism

and drm prime landed in the same year

commit 3248877ea1796915419fba7c89315fdbf00cb56a
(airlied/drm-prime-dmabuf-initial)
Author: Dave Airlie <[e-mail]>
Date:   Fri Nov 25 15:21:02 2011 +0000

   drm: base prime/dma-buf support (v5)

dma-resv was extracted much later

commit 786d7257e537da0674c02e16e3b30a44665d1cee
Author: Maarten Lankhorst <[e-mail]>
Date:   Thu Jun 27 13:48:16 2013 +0200

   reservation: cross-device reservation support, v4

Maarten's patch only extracted the dma_resv stuff so it's there,
optionally. There was never any effort to roll this out to all the
existing drivers, of which there were plenty.

It is, and has been since 10 years, totally fine to access dma-buf
without looking at any fences at all. From your pov of a ttm driver
dma-resv is mainly used for memory management and not sync, but I
think that's also due to some reinterpretation of the actual sync
rules on your side. For everyone else the dma_resv attached to a
dma-buf has been about implicit sync only, nothing else.

_only_ when you have a dynamic importer/exporter can you assume that
the dma_resv fences must actually be obeyed. That's one of the reasons
why we had to make this a completely new mode (the other one was
locking, but they really tie together).

Wrt your problems:
a) needs to be fixed in drivers exporting buffers and failing to make
sure the memory is there by the time dma_buf_map_attachment returns.
b) needs to be fixed in the importers, and there's quite a few of
those. There's more than i915 here, which is why I think we should
have the dma_resv_add_shared_exclusive helper extracted from amdgpu.
Avoids hand-rolling this about 5 times (6 if we include the import
ioctl from Jason).

Also I've like been trying to explain this ever since the entire
dynamic dma-buf thing started.
-Daniel

Christian König June 18, 2021, 6:01 p.m. UTC | #12

Am 18.06.21 um 19:20 schrieb Daniel Vetter:
> On Fri, Jun 18, 2021 at 6:43 PM Christian König
> <[e-mail]> wrote:
>> Am 18.06.21 um 17:17 schrieb Daniel Vetter:
>>> [SNIP]
>>> Ignoring _all_ fences is officially ok for pinned dma-buf. This is
>>> what v4l does. Aside from it's definitely not just i915 that does this
>>> even on the drm side, we have a few more drivers nowadays.
>> No it seriously isn't. If drivers are doing this they are more than broken.
>>
>> See the comment in dma-resv.h
>>
>>    * Based on bo.c which bears the following copyright notice,
>>    * but is dual licensed:
>> ....
>>
>>
>> The handling in ttm_bo.c is and always was that the exclusive fence is
>> used for buffer moves.
>>
>> As I said multiple times now the *MAIN* purpose of the dma_resv object
>> is memory management and *NOT* synchronization.
>>
>> Those restrictions come from the original design of TTM where the
>> dma_resv object originated from.
>>
>> The resulting consequences are that:
>>
>> a) If you access the buffer without waiting for the exclusive fence you
>> run into a potential information leak.
>>       We kind of let that slip for V4L since they only access the buffers
>> for writes, so you can't do any harm there.
>>
>> b) If you overwrite the exclusive fence with a new one without waiting
>> for the old one to signal you open up the possibility for userspace to
>> access freed up memory.
>>       This is a complete show stopper since it means that taking over the
>> system is just a typing exercise.
>>
>>
>> What you have done by allowing this in is ripping open a major security
>> hole for any DMA-buf import in i915 from all TTM based driver.
>>
>> This needs to be fixed ASAP, either by waiting in i915 and all other
>> drivers doing this for the exclusive fence while importing a DMA-buf or
>> by marking i915 and all other drivers as broken.
>>
>> Sorry, but if you allowed that in you seriously have no idea what you
>> are talking about here and where all of this originated from.
> Dude, get a grip, seriously. dma-buf landed in 2011
>
> commit d15bd7ee445d0702ad801fdaece348fdb79e6581
> Author: Sumit Semwal <[e-mail]>
> Date:   Mon Dec 26 14:53:15 2011 +0530
>
>     dma-buf: Introduce dma buffer sharing mechanism
>
> and drm prime landed in the same year
>
> commit 3248877ea1796915419fba7c89315fdbf00cb56a
> (airlied/drm-prime-dmabuf-initial)
> Author: Dave Airlie <[e-mail]>
> Date:   Fri Nov 25 15:21:02 2011 +0000
>
>     drm: base prime/dma-buf support (v5)
>
> dma-resv was extracted much later
>
> commit 786d7257e537da0674c02e16e3b30a44665d1cee
> Author: Maarten Lankhorst <[e-mail]>
> Date:   Thu Jun 27 13:48:16 2013 +0200
>
>     reservation: cross-device reservation support, v4
>
> Maarten's patch only extracted the dma_resv stuff so it's there,
> optionally. There was never any effort to roll this out to all the
> existing drivers, of which there were plenty.
>
> It is, and has been since 10 years, totally fine to access dma-buf
> without looking at any fences at all. From your pov of a ttm driver
> dma-resv is mainly used for memory management and not sync, but I
> think that's also due to some reinterpretation of the actual sync
> rules on your side. For everyone else the dma_resv attached to a
> dma-buf has been about implicit sync only, nothing else.

No, that was way before my time.

The whole thing was introduced with this commit here:

commit f2c24b83ae90292d315aa7ac029c6ce7929e01aa
Author: Maarten Lankhorst <[e-mail]>
Date:   Wed Apr 2 17:14:48 2014 +0200

     drm/ttm: flip the switch, and convert to dma_fence

     Signed-off-by: Maarten Lankhorst <[e-mail]>

  int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
....
-       bo->sync_obj = driver->sync_obj_ref(sync_obj);
+       reservation_object_add_excl_fence(bo->resv, fence);
         if (evict) {

Maarten replaced the bo->sync_obj reference with the dma_resv exclusive 
fence.

This means that we need to apply the sync_obj semantic to all drivers 
using a DMA-buf with its dma_resv object, otherwise you break imports 
from TTM drivers.

Since then and up till now the exclusive fence must be waited on and 
never replaced with anything which signals before the old fence.

Maarten and I think Thomas did that and I was always assuming that you 
know about this design decision.

It's absolutely not that this is my invention, I'm just telling you how 
it ever was.

Anyway this means we have a seriously misunderstanding and yes now some 
of our discussions about dynamic P2P suddenly make much more sense.

Regards,
Christian.


>
> _only_ when you have a dynamic importer/exporter can you assume that
> the dma_resv fences must actually be obeyed. That's one of the reasons
> why we had to make this a completely new mode (the other one was
> locking, but they really tie together).
>
> Wrt your problems:
> a) needs to be fixed in drivers exporting buffers and failing to make
> sure the memory is there by the time dma_buf_map_attachment returns.
> b) needs to be fixed in the importers, and there's quite a few of
> those. There's more than i915 here, which is why I think we should
> have the dma_resv_add_shared_exclusive helper extracted from amdgpu.
> Avoids hand-rolling this about 5 times (6 if we include the import
> ioctl from Jason).
>
> Also I've like been trying to explain this ever since the entire
> dynamic dma-buf thing started.
> -Daniel

Daniel Stone June 18, 2021, 6:20 p.m. UTC | #13

Sorry for the mobile reply, but V4L2 is absolutely not write-only; there has never been an intersection of V4L2 supporting dmabuf and not supporting reads.

I see your point about the heritage of dma_resv but it’s a red herring. It doesn’t matter who’s right, or who was first, or where the code was extracted from.

It’s well defined that amdgpu defines resv to be one thing, that every other non-TTM user defines it to be something very different, and that the other TTM users define it to be something in the middle.

We’ll never get to anything workable if we keep arguing who’s right. Everyone is wrong, because dma_resv doesn’t globally mean anything.

It seems clear that there are three classes of synchronisation barrier (not using the ‘f’ word here), in descending exclusion order:
  - memory management barriers (amdgpu exclusive fence / ttm_bo->moving)
  - implicit synchronisation write barriers (everyone else’s exclusive fences, amdgpu’s shared fences)
  - implicit synchronisation read barriers (everyone else’s shared fences, also amdgpu’s shared fences sometimes)

I don’t see a world in which these three uses can be reduced to two slots. What also isn’t clear to me though, is how the memory-management barriers can exclude all other access in the original proposal with purely userspace CS. Retaining the three separate modes also seems like a hard requirement to not completely break userspace, but then I don’t see how three separate slots would work if they need to be temporally ordered. amdgpu fixed this by redefining the meaning of the two slots, others fixed this by not doing one of the three modes.

So how do we square the circle without encoding a DAG into the kernel? Do the two slots need to become a single list which is ordered by time + ‘weight’ and flattened whenever modified? Something else?

Have a great weekend.

-d

> On 18 Jun 2021, at 5:43 pm, Christian König <[e-mail]> wrote:
> 
> Am 18.06.21 um 17:17 schrieb Daniel Vetter:
>> [SNIP]
>> Ignoring _all_ fences is officially ok for pinned dma-buf. This is
>> what v4l does. Aside from it's definitely not just i915 that does this
>> even on the drm side, we have a few more drivers nowadays.
> 
> No it seriously isn't. If drivers are doing this they are more than broken.
> 
> See the comment in dma-resv.h
> 
>  * Based on bo.c which bears the following copyright notice,
>  * but is dual licensed:
> ....
> 
> 
> The handling in ttm_bo.c is and always was that the exclusive fence is used for buffer moves.
> 
> As I said multiple times now the *MAIN* purpose of the dma_resv object is memory management and *NOT* synchronization.
> 
> Those restrictions come from the original design of TTM where the dma_resv object originated from.
> 
> The resulting consequences are that:
> 
> a) If you access the buffer without waiting for the exclusive fence you run into a potential information leak.
>     We kind of let that slip for V4L since they only access the buffers for writes, so you can't do any harm there.
> 
> b) If you overwrite the exclusive fence with a new one without waiting for the old one to signal you open up the possibility for userspace to access freed up memory.
>     This is a complete show stopper since it means that taking over the system is just a typing exercise.
> 
> 
> What you have done by allowing this in is ripping open a major security hole for any DMA-buf import in i915 from all TTM based driver.
> 
> This needs to be fixed ASAP, either by waiting in i915 and all other drivers doing this for the exclusive fence while importing a DMA-buf or by marking i915 and all other drivers as broken.
> 
> Sorry, but if you allowed that in you seriously have no idea what you are talking about here and where all of this originated from.
> 
> Regards,
> Christian.

Christian König June 18, 2021, 6:44 p.m. UTC | #14

Hi Daniel,

thanks for jumping in here.

And yes, you are absolutely right we need to get this fixed and not yell 
at each other that we have a different understanding of things.

Your proposal sounds sane to me, but I wouldn't call it slots. Rather 
something like "use cases" since we can have multiple fences for each 
category I think.

And I see at four here:

1. Internal kernel memory management. Everybody needs to wait for this, 
it's equal to bo->moving.
2. Writers for implicit sync, implicit sync readers should wait for them.
3. Readers for implicit sync, implicit sync writers should wait for them.
4. Things like TLB flushes and page table updates, no implicit sync but 
memory management must take them into account before moving/freeing 
backing store.

Happy weekend and hopefully not so much heat guys.

Cheers,
Christian.

Am 18.06.21 um 20:20 schrieb Daniel Stone:
> Sorry for the mobile reply, but V4L2 is absolutely not write-only; there has never been an intersection of V4L2 supporting dmabuf and not supporting reads.
>
> I see your point about the heritage of dma_resv but it’s a red herring. It doesn’t matter who’s right, or who was first, or where the code was extracted from.
>
> It’s well defined that amdgpu defines resv to be one thing, that every other non-TTM user defines it to be something very different, and that the other TTM users define it to be something in the middle.
>
> We’ll never get to anything workable if we keep arguing who’s right. Everyone is wrong, because dma_resv doesn’t globally mean anything.
>
> It seems clear that there are three classes of synchronisation barrier (not using the ‘f’ word here), in descending exclusion order:
>    - memory management barriers (amdgpu exclusive fence / ttm_bo->moving)
>    - implicit synchronisation write barriers (everyone else’s exclusive fences, amdgpu’s shared fences)
>    - implicit synchronisation read barriers (everyone else’s shared fences, also amdgpu’s shared fences sometimes)
>
> I don’t see a world in which these three uses can be reduced to two slots. What also isn’t clear to me though, is how the memory-management barriers can exclude all other access in the original proposal with purely userspace CS. Retaining the three separate modes also seems like a hard requirement to not completely break userspace, but then I don’t see how three separate slots would work if they need to be temporally ordered. amdgpu fixed this by redefining the meaning of the two slots, others fixed this by not doing one of the three modes.
>
> So how do we square the circle without encoding a DAG into the kernel? Do the two slots need to become a single list which is ordered by time + ‘weight’ and flattened whenever modified? Something else?
>
> Have a great weekend.
>
> -d
>
>> On 18 Jun 2021, at 5:43 pm, Christian König <[e-mail]> wrote:
>>
>> Am 18.06.21 um 17:17 schrieb Daniel Vetter:
>>> [SNIP]
>>> Ignoring _all_ fences is officially ok for pinned dma-buf. This is
>>> what v4l does. Aside from it's definitely not just i915 that does this
>>> even on the drm side, we have a few more drivers nowadays.
>> No it seriously isn't. If drivers are doing this they are more than broken.
>>
>> See the comment in dma-resv.h
>>
>>   * Based on bo.c which bears the following copyright notice,
>>   * but is dual licensed:
>> ....
>>
>>
>> The handling in ttm_bo.c is and always was that the exclusive fence is used for buffer moves.
>>
>> As I said multiple times now the *MAIN* purpose of the dma_resv object is memory management and *NOT* synchronization.
>>
>> Those restrictions come from the original design of TTM where the dma_resv object originated from.
>>
>> The resulting consequences are that:
>>
>> a) If you access the buffer without waiting for the exclusive fence you run into a potential information leak.
>>      We kind of let that slip for V4L since they only access the buffers for writes, so you can't do any harm there.
>>
>> b) If you overwrite the exclusive fence with a new one without waiting for the old one to signal you open up the possibility for userspace to access freed up memory.
>>      This is a complete show stopper since it means that taking over the system is just a typing exercise.
>>
>>
>> What you have done by allowing this in is ripping open a major security hole for any DMA-buf import in i915 from all TTM based driver.
>>
>> This needs to be fixed ASAP, either by waiting in i915 and all other drivers doing this for the exclusive fence while importing a DMA-buf or by marking i915 and all other drivers as broken.
>>
>> Sorry, but if you allowed that in you seriously have no idea what you are talking about here and where all of this originated from.
>>
>> Regards,
>> Christian.

Daniel Vetter June 18, 2021, 6:45 p.m. UTC | #15

On Fri, Jun 18, 2021 at 8:02 PM Christian König
<[e-mail]> wrote:
>
> Am 18.06.21 um 19:20 schrieb Daniel Vetter:
> > On Fri, Jun 18, 2021 at 6:43 PM Christian König
> > <[e-mail]> wrote:
> >> Am 18.06.21 um 17:17 schrieb Daniel Vetter:
> >>> [SNIP]
> >>> Ignoring _all_ fences is officially ok for pinned dma-buf. This is
> >>> what v4l does. Aside from it's definitely not just i915 that does this
> >>> even on the drm side, we have a few more drivers nowadays.
> >> No it seriously isn't. If drivers are doing this they are more than broken.
> >>
> >> See the comment in dma-resv.h
> >>
> >>    * Based on bo.c which bears the following copyright notice,
> >>    * but is dual licensed:
> >> ....
> >>
> >>
> >> The handling in ttm_bo.c is and always was that the exclusive fence is
> >> used for buffer moves.
> >>
> >> As I said multiple times now the *MAIN* purpose of the dma_resv object
> >> is memory management and *NOT* synchronization.
> >>
> >> Those restrictions come from the original design of TTM where the
> >> dma_resv object originated from.
> >>
> >> The resulting consequences are that:
> >>
> >> a) If you access the buffer without waiting for the exclusive fence you
> >> run into a potential information leak.
> >>       We kind of let that slip for V4L since they only access the buffers
> >> for writes, so you can't do any harm there.
> >>
> >> b) If you overwrite the exclusive fence with a new one without waiting
> >> for the old one to signal you open up the possibility for userspace to
> >> access freed up memory.
> >>       This is a complete show stopper since it means that taking over the
> >> system is just a typing exercise.
> >>
> >>
> >> What you have done by allowing this in is ripping open a major security
> >> hole for any DMA-buf import in i915 from all TTM based driver.
> >>
> >> This needs to be fixed ASAP, either by waiting in i915 and all other
> >> drivers doing this for the exclusive fence while importing a DMA-buf or
> >> by marking i915 and all other drivers as broken.
> >>
> >> Sorry, but if you allowed that in you seriously have no idea what you
> >> are talking about here and where all of this originated from.
> > Dude, get a grip, seriously. dma-buf landed in 2011
> >
> > commit d15bd7ee445d0702ad801fdaece348fdb79e6581
> > Author: Sumit Semwal <[e-mail]>
> > Date:   Mon Dec 26 14:53:15 2011 +0530
> >
> >     dma-buf: Introduce dma buffer sharing mechanism
> >
> > and drm prime landed in the same year
> >
> > commit 3248877ea1796915419fba7c89315fdbf00cb56a
> > (airlied/drm-prime-dmabuf-initial)
> > Author: Dave Airlie <[e-mail]>
> > Date:   Fri Nov 25 15:21:02 2011 +0000
> >
> >     drm: base prime/dma-buf support (v5)
> >
> > dma-resv was extracted much later
> >
> > commit 786d7257e537da0674c02e16e3b30a44665d1cee
> > Author: Maarten Lankhorst <[e-mail]>
> > Date:   Thu Jun 27 13:48:16 2013 +0200
> >
> >     reservation: cross-device reservation support, v4
> >
> > Maarten's patch only extracted the dma_resv stuff so it's there,
> > optionally. There was never any effort to roll this out to all the
> > existing drivers, of which there were plenty.
> >
> > It is, and has been since 10 years, totally fine to access dma-buf
> > without looking at any fences at all. From your pov of a ttm driver
> > dma-resv is mainly used for memory management and not sync, but I
> > think that's also due to some reinterpretation of the actual sync
> > rules on your side. For everyone else the dma_resv attached to a
> > dma-buf has been about implicit sync only, nothing else.
>
> No, that was way before my time.
>
> The whole thing was introduced with this commit here:
>
> commit f2c24b83ae90292d315aa7ac029c6ce7929e01aa
> Author: Maarten Lankhorst <[e-mail]>
> Date:   Wed Apr 2 17:14:48 2014 +0200
>
>      drm/ttm: flip the switch, and convert to dma_fence
>
>      Signed-off-by: Maarten Lankhorst <[e-mail]>
>
>   int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
> ....
> -       bo->sync_obj = driver->sync_obj_ref(sync_obj);
> +       reservation_object_add_excl_fence(bo->resv, fence);
>          if (evict) {
>
> Maarten replaced the bo->sync_obj reference with the dma_resv exclusive
> fence.
>
> This means that we need to apply the sync_obj semantic to all drivers
> using a DMA-buf with its dma_resv object, otherwise you break imports
> from TTM drivers.
>
> Since then and up till now the exclusive fence must be waited on and
> never replaced with anything which signals before the old fence.
>
> Maarten and I think Thomas did that and I was always assuming that you
> know about this design decision.

Surprisingly I do actually know this.

Still the commit you cite did _not_ change any of the rules around
dma_buf: Importers have _no_ obligation to obey the exclusive fence,
because the buffer is pinned. None of the work that Maarten has done
has fundamentally changed this contract in any way.

If amdgpu (or any other ttm based driver) hands back and sgt without
waiting for ttm_bo->moving or the exclusive fence first, then that's a
bug we need to fix in these drivers. But if ttm based drivers did get
this wrong, then they got this wrong both before and after the switch
over to using dma_resv - this bug would go back all the way to Dave's
introduction of drm_prime.c and support for that.

The only thing which importers have to do is not wreak the DAG nature
of the dma_resv fences and drop dependencies. Currently there's a
handful of drivers which break this (introduced over the last few
years), and I have it somewhere on my todo list to audit&fix them all.

The goal with extracting dma_resv from ttm was to make implicit sync
working and get rid of some terrible stalls on the userspace side.
Eventually it was also the goal to make truly dynamic buffer
reservation possible, but that took another 6 or so years to realize
with your work. And we had to make dynamic dma-buf very much opt-in,
because auditing all the users is very hard work and no one
volunteered. And for dynamic dma-buf the rule is that the exclusive
fence must _never_ be ignored, and the two drivers supporting it (mlx5
and amdgpu) obey that.

So yeah for ttm drivers dma_resv is primarily for memory management,
with a side effect of also supporting implicit sync.

For everyone else (and this includes a pile of render drivers, all the
atomic kms drivers, v4l and I have no idea what else on top) dma_resv
was only ever about implicit sync, and it can be ignored. And it (the
implicit sync side) has to be ignored to be able to support vulkan
winsys buffers correctly without stalling where we shouldn't. Also we
have to ignore it on atomic kms side too (and depending upon whether
writeback is supported atomic kms is perfectly capable of reading out
any buffer passed to it).

> It's absolutely not that this is my invention, I'm just telling you how
> it ever was.
>
> Anyway this means we have a seriously misunderstanding and yes now some
> of our discussions about dynamic P2P suddenly make much more sense.

Yeah I think at least we finally managed to get this across.

Anyway I guess w/e for me now, otherwise we'll probably resort to
throwing chairs :-) I'm dearly hoping the thunderstorms all around me
actually get all the way to me, because it's way, way too hot here
right now.

Cheers, Daniel

> Regards,
> Christian.
>
>
> >
> > _only_ when you have a dynamic importer/exporter can you assume that
> > the dma_resv fences must actually be obeyed. That's one of the reasons
> > why we had to make this a completely new mode (the other one was
> > locking, but they really tie together).
> >
> > Wrt your problems:
> > a) needs to be fixed in drivers exporting buffers and failing to make
> > sure the memory is there by the time dma_buf_map_attachment returns.
> > b) needs to be fixed in the importers, and there's quite a few of
> > those. There's more than i915 here, which is why I think we should
> > have the dma_resv_add_shared_exclusive helper extracted from amdgpu.
> > Avoids hand-rolling this about 5 times (6 if we include the import
> > ioctl from Jason).
> >
> > Also I've like been trying to explain this ever since the entire
> > dynamic dma-buf thing started.
> > -Daniel
>

Christian König June 21, 2021, 10:16 a.m. UTC | #16

Am 18.06.21 um 20:45 schrieb Daniel Vetter:
> On Fri, Jun 18, 2021 at 8:02 PM Christian König
> <[e-mail]> wrote:
>> Am 18.06.21 um 19:20 schrieb Daniel Vetter:
>> [SNIP]
>> The whole thing was introduced with this commit here:
>>
>> commit f2c24b83ae90292d315aa7ac029c6ce7929e01aa
>> Author: Maarten Lankhorst <[e-mail]>
>> Date:   Wed Apr 2 17:14:48 2014 +0200
>>
>>       drm/ttm: flip the switch, and convert to dma_fence
>>
>>       Signed-off-by: Maarten Lankhorst <[e-mail]>
>>
>>    int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
>> ....
>> -       bo->sync_obj = driver->sync_obj_ref(sync_obj);
>> +       reservation_object_add_excl_fence(bo->resv, fence);
>>           if (evict) {
>>
>> Maarten replaced the bo->sync_obj reference with the dma_resv exclusive
>> fence.
>>
>> This means that we need to apply the sync_obj semantic to all drivers
>> using a DMA-buf with its dma_resv object, otherwise you break imports
>> from TTM drivers.
>>
>> Since then and up till now the exclusive fence must be waited on and
>> never replaced with anything which signals before the old fence.
>>
>> Maarten and I think Thomas did that and I was always assuming that you
>> know about this design decision.
> Surprisingly I do actually know this.
>
> Still the commit you cite did _not_ change any of the rules around
> dma_buf: Importers have _no_ obligation to obey the exclusive fence,
> because the buffer is pinned. None of the work that Maarten has done
> has fundamentally changed this contract in any way.

Well I now agree that the rules around dma_resv are different than I 
thought, but this change should have raised more eyebrows.

The problem is this completely broke interop with all drivers using TTM 
and I think might even explain some bug reports.

I re-introduced the moving fence by adding bo->moving a few years after 
the initial introduction of dma_resv, but that was just to work around 
performance problems introduced by using the exclusive fence for both 
use cases.

> If amdgpu (or any other ttm based driver) hands back and sgt without
> waiting for ttm_bo->moving or the exclusive fence first, then that's a
> bug we need to fix in these drivers. But if ttm based drivers did get
> this wrong, then they got this wrong both before and after the switch
> over to using dma_resv - this bug would go back all the way to Dave's
> introduction of drm_prime.c and support for that.

I'm not 100% sure, but I think before the switch to the dma_resv object 
drivers just waited for the BOs to become idle and that should have 
prevented this.

Anyway let's stop discussing history and move forward. Sending patches 
for all affected TTM driver with CC: stable tags in a minute.


> The only thing which importers have to do is not wreak the DAG nature
> of the dma_resv fences and drop dependencies. Currently there's a
> handful of drivers which break this (introduced over the last few
> years), and I have it somewhere on my todo list to audit&fix them all.

Please give that some priority.

Ignoring the moving fence is a information leak, but messing up the DAG 
gives you access to freed up memory.

> The goal with extracting dma_resv from ttm was to make implicit sync
> working and get rid of some terrible stalls on the userspace side.
> Eventually it was also the goal to make truly dynamic buffer
> reservation possible, but that took another 6 or so years to realize
> with your work. And we had to make dynamic dma-buf very much opt-in,
> because auditing all the users is very hard work and no one
> volunteered. And for dynamic dma-buf the rule is that the exclusive
> fence must _never_ be ignored, and the two drivers supporting it (mlx5
> and amdgpu) obey that.
>
> So yeah for ttm drivers dma_resv is primarily for memory management,
> with a side effect of also supporting implicit sync.
>
> For everyone else (and this includes a pile of render drivers, all the
> atomic kms drivers, v4l and I have no idea what else on top) dma_resv
> was only ever about implicit sync, and it can be ignored. And it (the
> implicit sync side) has to be ignored to be able to support vulkan
> winsys buffers correctly without stalling where we shouldn't. Also we
> have to ignore it on atomic kms side too (and depending upon whether
> writeback is supported atomic kms is perfectly capable of reading out
> any buffer passed to it).

Oh! That might actually explain some issues, but that just completely 
breaks when TTM based drivers use atomic.

In other words for the first use is actually rather likely for TTM based 
drivers to need to move the buffer around so that scanout is possible.

And that in turn means you need to wait for this move to finish even if 
you have an explicit fence to wait for. IIRC amdgpu rolled its own 
implementation of this and radeon doesn't have atomic, but nouveau is 
most like broken.

So we do need a better solution for this sooner or later.

>> It's absolutely not that this is my invention, I'm just telling you how
>> it ever was.
>>
>> Anyway this means we have a seriously misunderstanding and yes now some
>> of our discussions about dynamic P2P suddenly make much more sense.
> Yeah I think at least we finally managed to get this across.
>
> Anyway I guess w/e for me now, otherwise we'll probably resort to
> throwing chairs :-) I'm dearly hoping the thunderstorms all around me
> actually get all the way to me, because it's way, way too hot here
> right now.

Well it's probably rather Dave or Linus who might start to throw chairs 
at us to not getting this straight sooner.

At least the weather is getting more durable.

Cheers,
Christian.

>
> Cheers, Daniel
>
>> Regards,
>> Christian.
>>
>>
>>> _only_ when you have a dynamic importer/exporter can you assume that
>>> the dma_resv fences must actually be obeyed. That's one of the reasons
>>> why we had to make this a completely new mode (the other one was
>>> locking, but they really tie together).
>>>
>>> Wrt your problems:
>>> a) needs to be fixed in drivers exporting buffers and failing to make
>>> sure the memory is there by the time dma_buf_map_attachment returns.
>>> b) needs to be fixed in the importers, and there's quite a few of
>>> those. There's more than i915 here, which is why I think we should
>>> have the dma_resv_add_shared_exclusive helper extracted from amdgpu.
>>> Avoids hand-rolling this about 5 times (6 if we include the import
>>> ioctl from Jason).
>>>
>>> Also I've like been trying to explain this ever since the entire
>>> dynamic dma-buf thing started.
>>> -Daniel
>

Daniel Vetter June 21, 2021, 1:57 p.m. UTC | #17

On Mon, Jun 21, 2021 at 12:16:55PM +0200, Christian König wrote:
> Am 18.06.21 um 20:45 schrieb Daniel Vetter:
> > On Fri, Jun 18, 2021 at 8:02 PM Christian König
> > <[e-mail]> wrote:
> > > Am 18.06.21 um 19:20 schrieb Daniel Vetter:
> > > [SNIP]
> > > The whole thing was introduced with this commit here:
> > > 
> > > commit f2c24b83ae90292d315aa7ac029c6ce7929e01aa
> > > Author: Maarten Lankhorst <[e-mail]>
> > > Date:   Wed Apr 2 17:14:48 2014 +0200
> > > 
> > >       drm/ttm: flip the switch, and convert to dma_fence
> > > 
> > >       Signed-off-by: Maarten Lankhorst <[e-mail]>
> > > 
> > >    int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
> > > ....
> > > -       bo->sync_obj = driver->sync_obj_ref(sync_obj);
> > > +       reservation_object_add_excl_fence(bo->resv, fence);
> > >           if (evict) {
> > > 
> > > Maarten replaced the bo->sync_obj reference with the dma_resv exclusive
> > > fence.
> > > 
> > > This means that we need to apply the sync_obj semantic to all drivers
> > > using a DMA-buf with its dma_resv object, otherwise you break imports
> > > from TTM drivers.
> > > 
> > > Since then and up till now the exclusive fence must be waited on and
> > > never replaced with anything which signals before the old fence.
> > > 
> > > Maarten and I think Thomas did that and I was always assuming that you
> > > know about this design decision.
> > Surprisingly I do actually know this.
> > 
> > Still the commit you cite did _not_ change any of the rules around
> > dma_buf: Importers have _no_ obligation to obey the exclusive fence,
> > because the buffer is pinned. None of the work that Maarten has done
> > has fundamentally changed this contract in any way.
> 
> Well I now agree that the rules around dma_resv are different than I
> thought, but this change should have raised more eyebrows.
> 
> The problem is this completely broke interop with all drivers using TTM and
> I think might even explain some bug reports.
> 
> I re-introduced the moving fence by adding bo->moving a few years after the
> initial introduction of dma_resv, but that was just to work around
> performance problems introduced by using the exclusive fence for both use
> cases.

Ok that part is indeed not something I've known.

> > If amdgpu (or any other ttm based driver) hands back and sgt without
> > waiting for ttm_bo->moving or the exclusive fence first, then that's a
> > bug we need to fix in these drivers. But if ttm based drivers did get
> > this wrong, then they got this wrong both before and after the switch
> > over to using dma_resv - this bug would go back all the way to Dave's
> > introduction of drm_prime.c and support for that.
> 
> I'm not 100% sure, but I think before the switch to the dma_resv object
> drivers just waited for the BOs to become idle and that should have
> prevented this.
> 
> Anyway let's stop discussing history and move forward. Sending patches for
> all affected TTM driver with CC: stable tags in a minute.
> 
> 
> > The only thing which importers have to do is not wreak the DAG nature
> > of the dma_resv fences and drop dependencies. Currently there's a
> > handful of drivers which break this (introduced over the last few
> > years), and I have it somewhere on my todo list to audit&fix them all.
> 
> Please give that some priority.
> 
> Ignoring the moving fence is a information leak, but messing up the DAG
> gives you access to freed up memory.

Yeah will try to. I've also been hung up a bit on how to fix that, but I
think just closing the DAG-breakage is simplest. Any userspace which then
complains about the additional sync that causes would then be motivated to
look into the import ioctl Jason has. And I think the impact in practice
should be minimal, aside from some corner cases.

> > The goal with extracting dma_resv from ttm was to make implicit sync
> > working and get rid of some terrible stalls on the userspace side.
> > Eventually it was also the goal to make truly dynamic buffer
> > reservation possible, but that took another 6 or so years to realize
> > with your work. And we had to make dynamic dma-buf very much opt-in,
> > because auditing all the users is very hard work and no one
> > volunteered. And for dynamic dma-buf the rule is that the exclusive
> > fence must _never_ be ignored, and the two drivers supporting it (mlx5
> > and amdgpu) obey that.
> > 
> > So yeah for ttm drivers dma_resv is primarily for memory management,
> > with a side effect of also supporting implicit sync.
> > 
> > For everyone else (and this includes a pile of render drivers, all the
> > atomic kms drivers, v4l and I have no idea what else on top) dma_resv
> > was only ever about implicit sync, and it can be ignored. And it (the
> > implicit sync side) has to be ignored to be able to support vulkan
> > winsys buffers correctly without stalling where we shouldn't. Also we
> > have to ignore it on atomic kms side too (and depending upon whether
> > writeback is supported atomic kms is perfectly capable of reading out
> > any buffer passed to it).
> 
> Oh! That might actually explain some issues, but that just completely breaks
> when TTM based drivers use atomic.
> 
> In other words for the first use is actually rather likely for TTM based
> drivers to need to move the buffer around so that scanout is possible.
> 
> And that in turn means you need to wait for this move to finish even if you
> have an explicit fence to wait for. IIRC amdgpu rolled its own
> implementation of this and radeon doesn't have atomic, but nouveau is most
> like broken.
> 
> So we do need a better solution for this sooner or later.

So you're still allowed to have additional fences, but if you use the
default helpers then the explicit fenc will overwrite the exclusive fence
in the dma_resv object by default. Also with the default helpers we only
pick out the exclusive fence from the first object, in case you e.g.
supply a YUV buffers as multiple planes in multiple buffers.

But yeah there's probably some bugs here.

> > > It's absolutely not that this is my invention, I'm just telling you how
> > > it ever was.
> > > 
> > > Anyway this means we have a seriously misunderstanding and yes now some
> > > of our discussions about dynamic P2P suddenly make much more sense.
> > Yeah I think at least we finally managed to get this across.
> > 
> > Anyway I guess w/e for me now, otherwise we'll probably resort to
> > throwing chairs :-) I'm dearly hoping the thunderstorms all around me
> > actually get all the way to me, because it's way, way too hot here
> > right now.
> 
> Well it's probably rather Dave or Linus who might start to throw chairs at
> us to not getting this straight sooner.
> 
> At least the weather is getting more durable.

Yeah same here, I can put a t-shirt back on without dying!
-Daniel

> 
> Cheers,
> Christian.
> 
> > 
> > Cheers, Daniel
> > 
> > > Regards,
> > > Christian.
> > > 
> > > 
> > > > _only_ when you have a dynamic importer/exporter can you assume that
> > > > the dma_resv fences must actually be obeyed. That's one of the reasons
> > > > why we had to make this a completely new mode (the other one was
> > > > locking, but they really tie together).
> > > > 
> > > > Wrt your problems:
> > > > a) needs to be fixed in drivers exporting buffers and failing to make
> > > > sure the memory is there by the time dma_buf_map_attachment returns.
> > > > b) needs to be fixed in the importers, and there's quite a few of
> > > > those. There's more than i915 here, which is why I think we should
> > > > have the dma_resv_add_shared_exclusive helper extracted from amdgpu.
> > > > Avoids hand-rolling this about 5 times (6 if we include the import
> > > > ioctl from Jason).
> > > > 
> > > > Also I've like been trying to explain this ever since the entire
> > > > dynamic dma-buf thing started.
> > > > -Daniel
> > 
>