| Message ID | 20210705011755.3408-1-xxm@rock-chips.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v1,1/2] iio: adc: rockchip_saradc: add support for rk3568 saradc | expand |
Hi all, This patch is broken, discard. Resend in other patch set. Simon Xue. 在 2021/7/5 9:17, Simon Xue 写道: > It is similar to other devices, but with 8 channels. > > Signed-off-by: Simon Xue <xxm@rock-chips.com> > --- > drivers/iio/adc/rockchip_saradc.c | 22 +++++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) > > diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c > index 12584f1631d8..f3eb8d2e50dc 100644 > --- a/drivers/iio/adc/rockchip_saradc.c > +++ b/drivers/iio/adc/rockchip_saradc.c > @@ -35,7 +35,7 @@ > #define SARADC_DLY_PU_SOC_MASK 0x3f > > #define SARADC_TIMEOUT msecs_to_jiffies(100) > -#define SARADC_MAX_CHANNELS 6 > +#define SARADC_MAX_CHANNELS 8 > > struct rockchip_saradc_data { > const struct iio_chan_spec *channels; > @@ -192,6 +192,23 @@ static const struct rockchip_saradc_data rk3399_saradc_data = { > .clk_rate = 1000000, > }; > > +static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { > + SARADC_CHANNEL(0, "adc0", 10), > + SARADC_CHANNEL(1, "adc1", 10), > + SARADC_CHANNEL(2, "adc2", 10), > + SARADC_CHANNEL(3, "adc3", 10), > + SARADC_CHANNEL(4, "adc4", 10), > + SARADC_CHANNEL(5, "adc5", 10), > + SARADC_CHANNEL(6, "adc6", 10), > + SARADC_CHANNEL(7, "adc7", 10), > +}; > + > +static const struct rockchip_saradc_data rk3568_saradc_data = { > + .channels = rockchip_rk3568_saradc_iio_channels, > + .num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels), > + .clk_rate = 1000000, > +}; > + > static const struct of_device_id rockchip_saradc_match[] = { > { > .compatible = "rockchip,saradc", > @@ -202,6 +219,9 @@ static const struct of_device_id rockchip_saradc_match[] = { > }, { > .compatible = "rockchip,rk3399-saradc", > .data = &rk3399_saradc_data, > + }, { > + .compatible = "rockchip,rk3568-saradc", > + .data = &rk3568_saradc_data, > }, > {}, > };
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 12584f1631d8..f3eb8d2e50dc 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -35,7 +35,7 @@ #define SARADC_DLY_PU_SOC_MASK 0x3f #define SARADC_TIMEOUT msecs_to_jiffies(100) -#define SARADC_MAX_CHANNELS 6 +#define SARADC_MAX_CHANNELS 8 struct rockchip_saradc_data { const struct iio_chan_spec *channels; @@ -192,6 +192,23 @@ static const struct rockchip_saradc_data rk3399_saradc_data = { .clk_rate = 1000000, }; +static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { + SARADC_CHANNEL(0, "adc0", 10), + SARADC_CHANNEL(1, "adc1", 10), + SARADC_CHANNEL(2, "adc2", 10), + SARADC_CHANNEL(3, "adc3", 10), + SARADC_CHANNEL(4, "adc4", 10), + SARADC_CHANNEL(5, "adc5", 10), + SARADC_CHANNEL(6, "adc6", 10), + SARADC_CHANNEL(7, "adc7", 10), +}; + +static const struct rockchip_saradc_data rk3568_saradc_data = { + .channels = rockchip_rk3568_saradc_iio_channels, + .num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels), + .clk_rate = 1000000, +}; + static const struct of_device_id rockchip_saradc_match[] = { { .compatible = "rockchip,saradc", @@ -202,6 +219,9 @@ static const struct of_device_id rockchip_saradc_match[] = { }, { .compatible = "rockchip,rk3399-saradc", .data = &rk3399_saradc_data, + }, { + .compatible = "rockchip,rk3568-saradc", + .data = &rk3568_saradc_data, }, {}, };
It is similar to other devices, but with 8 channels. Signed-off-by: Simon Xue <xxm@rock-chips.com> --- drivers/iio/adc/rockchip_saradc.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-)