| Message ID | 20210708015949.20076-2-wangkefeng.wang@huawei.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: Enable some feature for RISCV | expand |
On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote: > The timer interrupt and the perf interrupt on riscv are with > IRQF_PERCPU, so it's safe to allow forced interrupt threading. "Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after marking the interrupts which cant be threaded IRQF_NO_THREAD. All interrupts which have IRQF_TIMER set are implict marked IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded." Did you do that audit?
On 2021/7/8 13:28, Christoph Hellwig wrote: > On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote: >> The timer interrupt and the perf interrupt on riscv are with >> IRQF_PERCPU, so it's safe to allow forced interrupt threading. > "Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after > marking the interrupts which cant be threaded IRQF_NO_THREAD. > All interrupts which have IRQF_TIMER set are implict marked > IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded." > > Did you do that audit? Yes, I check the perf and timer on RISCV, arch/riscv/kernel/perf_event.c static int reserve_pmc_hardware(void) { err = request_irq(riscv_pmu->irq, riscv_pmu->handle_irq, IRQF_PERCPU, "riscv-base-perf", NULL); } drivers/clocksource/timer-riscv.c static int __init riscv_timer_init_dt(struct device_node *n) { error = request_percpu_irq(riscv_clock_event_irq, riscv_timer_interrupt, "riscv-timer", &riscv_clock_event); } Is this enough? > . >
On Wed, 07 Jul 2021 23:42:45 PDT (-0700), wangkefeng.wang@huawei.com wrote: > > On 2021/7/8 13:28, Christoph Hellwig wrote: >> On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote: >>> The timer interrupt and the perf interrupt on riscv are with >>> IRQF_PERCPU, so it's safe to allow forced interrupt threading. >> "Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after >> marking the interrupts which cant be threaded IRQF_NO_THREAD. >> All interrupts which have IRQF_TIMER set are implict marked >> IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded." >> >> Did you do that audit? > > Yes, I check the perf and timer on RISCV, > > arch/riscv/kernel/perf_event.c > > static int reserve_pmc_hardware(void) > > { > > err = request_irq(riscv_pmu->irq, riscv_pmu->handle_irq, > IRQF_PERCPU, "riscv-base-perf", NULL); > > } > > drivers/clocksource/timer-riscv.c > > static int __init riscv_timer_init_dt(struct device_node *n) > > { > > error = request_percpu_irq(riscv_clock_event_irq, > riscv_timer_interrupt, > "riscv-timer", &riscv_clock_event); > > } > > Is this enough? We also have the direct CLINT driver, but that's percpu as well. IIUC this means we're OK, I've put this (and the rest of the patch set) on for-next. Thanks!
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 469a70bd8da6..6356c14240c9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -91,6 +91,7 @@ config RISCV select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS select IRQ_DOMAIN + select IRQ_FORCED_THREADING select MODULES_USE_ELF_RELA if MODULES select MODULE_SECTIONS if MODULES select OF
The timer interrupt and the perf interrupt on riscv are with IRQF_PERCPU, so it's safe to allow forced interrupt threading. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+)