| Message ID | 20210711104105.505728-3-leo.yan@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | perf: Refine barriers for AUX ring buffer | expand |
On 11/07/2021 11:40, Leo Yan wrote: > Since a memory barrier is required between AUX trace data store and > aux_head store, and the AUX trace data is filled with memcpy(), it's > sufficient to use smp_wmb() so can ensure the trace data is visible > prior to updating aux_head. > > Signed-off-by: Leo Yan <leo.yan@linaro.org> > --- > drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c > index acdb59e0e661..713205db15a1 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c > +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c > @@ -1563,6 +1563,14 @@ tmc_update_etr_buffer(struct coresight_device *csdev, > */ > if (etr_perf->snapshot) > handle->head += size; > + > + /* > + * It requires the ordering between the AUX trace data and aux_head > + * store, below smp_wmb() ensures the AUX trace data is visible prior > + * to updating aux_head. > + */ Please could we reword this a bit, something like : /* * Ensure that the AUX trace data is visible before the aux_head * is updated via perf_aux_output_end(), as expected by the * perf ring buffer. */ > + smp_wmb(); > + Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Hi Suzuki, On Mon, Jul 12, 2021 at 11:40:12AM +0100, Suzuki Kuruppassery Poulose wrote: > On 11/07/2021 11:40, Leo Yan wrote: > > Since a memory barrier is required between AUX trace data store and > > aux_head store, and the AUX trace data is filled with memcpy(), it's > > sufficient to use smp_wmb() so can ensure the trace data is visible > > prior to updating aux_head. > > > > Signed-off-by: Leo Yan <leo.yan@linaro.org> > > --- > > drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c > > index acdb59e0e661..713205db15a1 100644 > > --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c > > +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c > > @@ -1563,6 +1563,14 @@ tmc_update_etr_buffer(struct coresight_device *csdev, > > */ > > if (etr_perf->snapshot) > > handle->head += size; > > + > > + /* > > + * It requires the ordering between the AUX trace data and aux_head > > + * store, below smp_wmb() ensures the AUX trace data is visible prior > > + * to updating aux_head. > > + */ > > Please could we reword this a bit, something like : > > /* > * Ensure that the AUX trace data is visible before the aux_head > * is updated via perf_aux_output_end(), as expected by the > * perf ring buffer. > */ Will refine with this in next spin. Thanks for review! > > + smp_wmb(); > > + > > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index acdb59e0e661..713205db15a1 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1563,6 +1563,14 @@ tmc_update_etr_buffer(struct coresight_device *csdev, */ if (etr_perf->snapshot) handle->head += size; + + /* + * It requires the ordering between the AUX trace data and aux_head + * store, below smp_wmb() ensures the AUX trace data is visible prior + * to updating aux_head. + */ + smp_wmb(); + out: /* * Don't set the TRUNCATED flag in snapshot mode because 1) the
Since a memory barrier is required between AUX trace data store and aux_head store, and the AUX trace data is filled with memcpy(), it's sufficient to use smp_wmb() so can ensure the trace data is visible prior to updating aux_head. Signed-off-by: Leo Yan <leo.yan@linaro.org> --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++++++++ 1 file changed, 8 insertions(+)