| Message ID | 20210707183616.5620-31-brijesh.singh@amd.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | Add AMD Secure Nested Paging (SEV-SNP) Hypervisor Support | expand |
Nit, please use "KVM: x86:" for the shortlogs. And ubernit, the "new" part is redundant and/or misleading, e.g. implies that more error code bits are being added to existing SNP/RMP checks. E.g. KVM: x86: Define RMP page fault error code bits for #NPT On Wed, Jul 07, 2021, Brijesh Singh wrote: > When SEV-SNP is enabled globally, the hardware places restrictions on all > memory accesses based on the RMP entry, whether the hyperviso or a VM, Another typo. > performs the accesses. When hardware encounters an RMP access violation > during a guest access, it will cause a #VMEXIT(NPF).
On 7/16/21 3:22 PM, Sean Christopherson wrote: > Nit, please use "KVM: x86:" for the shortlogs. And ubernit, the "new" part is > redundant and/or misleading, e.g. implies that more error code bits are being > added to existing SNP/RMP checks. E.g. > > KVM: x86: Define RMP page fault error code bits for #NPT Noted. > On Wed, Jul 07, 2021, Brijesh Singh wrote: >> When SEV-SNP is enabled globally, the hardware places restrictions on all >> memory accesses based on the RMP entry, whether the hyperviso or a VM, > Another typo. Noted. thanks
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index cd2e19e1d323..59185b6bc82a 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -239,8 +239,12 @@ enum x86_intercept_stage; #define PFERR_FETCH_BIT 4 #define PFERR_PK_BIT 5 #define PFERR_SGX_BIT 15 +#define PFERR_GUEST_RMP_BIT 31 #define PFERR_GUEST_FINAL_BIT 32 #define PFERR_GUEST_PAGE_BIT 33 +#define PFERR_GUEST_ENC_BIT 34 +#define PFERR_GUEST_SIZEM_BIT 35 +#define PFERR_GUEST_VMPL_BIT 36 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) @@ -251,6 +255,10 @@ enum x86_intercept_stage; #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) +#define PFERR_GUEST_RMP_MASK (1ULL << PFERR_GUEST_RMP_BIT) +#define PFERR_GUEST_ENC_MASK (1ULL << PFERR_GUEST_ENC_BIT) +#define PFERR_GUEST_SIZEM_MASK (1ULL << PFERR_GUEST_SIZEM_BIT) +#define PFERR_GUEST_VMPL_MASK (1ULL << PFERR_GUEST_VMPL_BIT) #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ PFERR_WRITE_MASK | \
When SEV-SNP is enabled globally, the hardware places restrictions on all memory accesses based on the RMP entry, whether the hyperviso or a VM, performs the accesses. When hardware encounters an RMP access violation during a guest access, it will cause a #VMEXIT(NPF). See APM2 section 16.36.10 for more details. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> --- arch/x86/include/asm/kvm_host.h | 8 ++++++++ 1 file changed, 8 insertions(+)