| Message ID | 20210719092842.4686-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add RZ/G2L DMAC support | expand |
On Mon, 19 Jul 2021 10:28:42 +0100, Biju Das wrote: > Document RZ/G2L DMAC bindings. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > v4->v5: > * Added Rob's Rb tag > v3->v4: > * Described clocks and reset properties > v2->v3: > * Added error interrupt first. > * Updated clock and reset maxitems. > * Added Geert's Rb tag. > v1->v2: > * Made interrupt names in defined order > * Removed src address and channel configuration from dma-cells. > * Changed the compatibele string to "renesas,r9a07g044-dmac". > v1:- > * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210611113642.18457-2-biju.das.jz@bp.renesas.com/ > --- > .../bindings/dma/renesas,rz-dmac.yaml | 124 ++++++++++++++++++ > 1 file changed, 124 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Error: Documentation/devicetree/bindings/dma/renesas,rz-dmac.example.dts:49.30-31 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/dma/renesas,rz-dmac.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1418: dt_binding_check] Error 2 \ndoc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1506873 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
Hi Rob, > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 19 July 2021 14:47 > To: Biju Das <biju.das.jz@bp.renesas.com> > Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>; > dmaengine@vger.kernel.org; devicetree@vger.kernel.org; Vinod Koul > <vkoul@kernel.org>; Chris Brandt <Chris.Brandt@renesas.com>; Geert > Uytterhoeven <geert+renesas@glider.be>; Rob Herring <robh+dt@kernel.org>; > Chris Paterson <Chris.Paterson2@renesas.com>; linux-renesas- > soc@vger.kernel.org > Subject: Re: [PATCH v4 1/4] dt-bindings: dma: Document RZ/G2L bindings > > On Mon, 19 Jul 2021 10:28:42 +0100, Biju Das wrote: > > Document RZ/G2L DMAC bindings. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Reviewed-by: Rob Herring <robh@kernel.org> > > --- > > v4->v5: > > * Added Rob's Rb tag > > v3->v4: > > * Described clocks and reset properties > > v2->v3: > > * Added error interrupt first. > > * Updated clock and reset maxitems. > > * Added Geert's Rb tag. > > v1->v2: > > * Made interrupt names in defined order > > * Removed src address and channel configuration from dma-cells. > > * Changed the compatibele string to "renesas,r9a07g044-dmac". > > v1:- > > * > > https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc > > hwork.kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F2021061111364 > > 2.18457-2-biju.das.jz%40bp.renesas.com%2F&data=04%7C01%7Cbiju.das. > > jz%40bp.renesas.com%7C0cbeffaf1b184c1b000108d94abbcd00%7C53d82571da194 > > 7e49cb4625a166a4a2a%7C0%7C0%7C637622992718168475%7CUnknown%7CTWFpbGZsb > > 3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > > 7C1000&sdata=mHxgj1z7gJVNfLw5QiY85Cj6PztxEcIlSpDPrKZdxQU%3D&re > > served=0 > > --- > > .../bindings/dma/renesas,rz-dmac.yaml | 124 ++++++++++++++++++ > > 1 file changed, 124 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > Error: Documentation/devicetree/bindings/dma/renesas,rz- > dmac.example.dts:49.30-31 syntax error FATAL ERROR: Unable to parse input > tree > make[1]: *** [scripts/Makefile.lib:380: > Documentation/devicetree/bindings/dma/renesas,rz-dmac.example.dt.yaml] > Error 1 > make[1]: *** Waiting for unfinished jobs.... > make: *** [Makefile:1418: dt_binding_check] Error 2 \ndoc reference errors > (make refcheckdocs): > > See > https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwor > k.ozlabs.org%2Fpatch%2F1506873&data=04%7C01%7Cbiju.das.jz%40bp.renesas > .com%7C0cbeffaf1b184c1b000108d94abbcd00%7C53d82571da1947e49cb4625a166a4a2a > %7C0%7C0%7C637622992718168475%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi > LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=rQTzshu8s9 > UJughkXAwZKv2TPHU%2FKQ2ea1UI%2FW6P20s%3D&reserved=0 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. The dependency patch for the bot error is present on 5.14-rc2 but not on 5.14-rc1. Regards, Biju > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml new file mode 100644 index 000000000000..31118f4707d3 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L DMA Controller + +maintainers: + - Biju Das <biju.das.jz@bp.renesas.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + items: + - enum: + - renesas,r9a07g044-dmac # RZ/G2{L,LC} + - const: renesas,rz-dmac + + reg: + items: + - description: Control and channel register block + - description: DMA extended resource selector block + + interrupts: + maxItems: 17 + + interrupt-names: + items: + - const: error + - const: ch0 + - const: ch1 + - const: ch2 + - const: ch3 + - const: ch4 + - const: ch5 + - const: ch6 + - const: ch7 + - const: ch8 + - const: ch9 + - const: ch10 + - const: ch11 + - const: ch12 + - const: ch13 + - const: ch14 + - const: ch15 + + clocks: + items: + - description: DMA main clock + - description: DMA register access clock + + '#dma-cells': + const: 1 + description: + The cell specifies the MID/RID of the DMAC port connected to + the DMA client. + + dma-channels: + const: 16 + + power-domains: + maxItems: 1 + + resets: + items: + - description: Reset for DMA ARESETN reset terminal + - description: Reset for DMA RST_ASYNC reset terminal + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - '#dma-cells' + - dma-channels + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/r9a07g044-cpg.h> + + dmac: dma-controller@11820000 { + compatible = "renesas,r9a07g044-dmac", + "renesas,rz-dmac"; + reg = <0x11820000 0x10000>, + <0x11830000 0x10000>; + interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>, + <&cpg CPG_MOD R9A07G044_DMAC_PCLK>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_DMAC_ARESETN>, + <&cpg R9A07G044_DMAC_RST_ASYNC>; + #dma-cells = <1>; + dma-channels = <16>; + };