| Message ID | 20210719224946.25359-1-ezequiel@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] arm64: dts: rockchip: add GPU node for rk3568 | expand |
Am Dienstag, 20. Juli 2021, 00:49:45 CEST schrieb Ezequiel Garcia: > Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core > which is based on the Bifrost architecture. It has > one shader core and two execution engines. > > Quoting the datasheet: > > Mali-G52 1-Core-2EE > * Support 1600Mpix/s fill rate when 800MHz clock frequency > * Support 38.4GLOPs when 800MHz clock frequency > > Mesa side: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771 missing an addition to Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml Thanks Heiko > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > --- > arch/arm64/boot/dts/rockchip/rk3568.dtsi | 47 ++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > index 618849186c39..59844dfaeb86 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > @@ -128,6 +128,35 @@ opp-1992000000 { > }; > }; > > + gpu_opp_table: opp-table2 { > + compatible = "operating-points-v2"; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <825000>; > + }; > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>; > + opp-microvolt = <825000>; > + }; > + opp-400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <825000>; > + }; > + opp-600000000 { > + opp-hz = /bits/ 64 <600000000>; > + opp-microvolt = <825000>; > + }; > + opp-700000000 { > + opp-hz = /bits/ 64 <700000000>; > + opp-microvolt = <900000>; > + }; > + opp-800000000 { > + opp-hz = /bits/ 64 <800000000>; > + opp-microvolt = <1000000>; > + }; > + }; > + > firmware { > scmi: scmi { > compatible = "arm,scmi-smc"; > @@ -351,6 +380,24 @@ power-domain@RK3568_PD_PIPE { > }; > }; > > + gpu: gpu@fde60000 { > + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; > + reg = <0x0 0xfde60000 0x0 0x4000>; > + > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "job", "mmu", "gpu"; > + > + clocks = <&scmi_clk 1>, <&cru CLK_GPU>; > + clock-names = "clk_mali", "bus"; > + operating-points-v2 = <&gpu_opp_table>; > + > + #cooling-cells = <2>; > + power-domains = <&power RK3568_PD_GPU>; > + status = "disabled"; > + }; > + > sdmmc2: mmc@fe000000 { > compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; > reg = <0x0 0xfe000000 0x0 0x4000>; >
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 618849186c39..59844dfaeb86 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -128,6 +128,35 @@ opp-1992000000 { }; }; + gpu_opp_table: opp-table2 { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + }; + }; + firmware { scmi: scmi { compatible = "arm,scmi-smc"; @@ -351,6 +380,24 @@ power-domain@RK3568_PD_PIPE { }; }; + gpu: gpu@fde60000 { + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x0 0xfde60000 0x0 0x4000>; + + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + + clocks = <&scmi_clk 1>, <&cru CLK_GPU>; + clock-names = "clk_mali", "bus"; + operating-points-v2 = <&gpu_opp_table>; + + #cooling-cells = <2>; + power-domains = <&power RK3568_PD_GPU>; + status = "disabled"; + }; + sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>;
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core which is based on the Bifrost architecture. It has one shader core and two execution engines. Quoting the datasheet: Mali-G52 1-Core-2EE * Support 1600Mpix/s fill rate when 800MHz clock frequency * Support 38.4GLOPs when 800MHz clock frequency Mesa side: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771 Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+)