diff mbox series

[v2,3/3] arm64: dts: qcom: sc7280: Add qfprom node

Message ID 1627560036-1626-4-git-send-email-rnayak@codeaurora.org (mailing list archive)
State Superseded
Headers show
Series nvmem: qfprom: Add binding updates and power-domain handling | expand

Commit Message

Rajendra Nayak July 29, 2021, noon UTC
Add the qfprom node and its properties for the sc7280 SoC.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Doug Anderson July 29, 2021, 4:24 p.m. UTC | #1
Hi,

On Thu, Jul 29, 2021 at 5:01 AM Rajendra Nayak <rnayak@codeaurora.org> wrote:
>
> Add the qfprom node and its properties for the sc7280 SoC.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)

Peachy! I guess a future patch will add things like USB2 trim and GPU
speed bin definitions?

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Rajendra Nayak July 30, 2021, 5:58 a.m. UTC | #2
On 7/29/2021 9:54 PM, Doug Anderson wrote:
> Hi,
> 
> On Thu, Jul 29, 2021 at 5:01 AM Rajendra Nayak <rnayak@codeaurora.org> wrote:
>>
>> Add the qfprom node and its properties for the sc7280 SoC.
>>
>> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
> 
> Peachy! I guess a future patch will add things like USB2 trim and GPU
> speed bin definitions?

Right, I left those out for a future patch.

> 
> Reviewed-by: Douglas Anderson <dianders@chromium.org>

Thanks
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 029723a..e87b210 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -442,6 +442,19 @@ 
 			#mbox-cells = <2>;
 		};
 
+		qfprom: efuse@784000 {
+			compatible = "qcom,sc7280-qfprom", "qcom,qfprom";
+			reg = <0 0x00784000 0 0xa20>,
+			      <0 0x00780000 0 0xa20>,
+			      <0 0x00782000 0 0x120>,
+			      <0 0x00786000 0 0x1fff>;
+			clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
+			clock-names = "core";
+			power-domains = <&rpmhpd SC7280_MX>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		sdhc_1: sdhci@7c4000 {
 			compatible = "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
 			status = "disabled";