| Message ID | 20210331204228.26107-2-avolmat@me.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduction of STiH418 based 4KOpen board | expand |
Hi Alain On 3/31/21 10:42 PM, Alain Volmat wrote: > With the introduction of new flexgen compatible within the clk-flexgen > driver, remove the clock-output-names entry from the flexgen nodes > and set the new proper compatible corresponding. > > Signed-off-by: Alain Volmat <avolmat@me.com> > --- > arch/arm/boot/dts/stih418-clock.dtsi | 96 ++-------------------------- > 1 file changed, 5 insertions(+), 91 deletions(-) > > diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi > index 8fa092462102..35d12979cdf4 100644 > --- a/arch/arm/boot/dts/stih418-clock.dtsi > +++ b/arch/arm/boot/dts/stih418-clock.dtsi > @@ -83,15 +83,12 @@ > }; > > clk_s_a0_flexgen: clk-s-a0-flexgen { > - compatible = "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih410-a0"; > > #clock-cells = <1>; > > clocks = <&clk_s_a0_pll 0>, > <&clk_sysin>; > - > - clock-output-names = "clk-ic-lmi0", > - "clk-ic-lmi1"; > }; > }; > > @@ -132,7 +129,7 @@ > > clk_s_c0_flexgen: clk-s-c0-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih418-c0"; > > clocks = <&clk_s_c0_pll0 0>, > <&clk_s_c0_pll1 0>, > @@ -142,49 +139,6 @@ > <&clk_s_c0_quadfs 3>, > <&clk_sysin>; > > - clock-output-names = "clk-icn-gpu", > - "clk-fdma", > - "clk-nand", > - "clk-hva", > - "clk-proc-stfe", > - "clk-tp", > - "clk-rx-icn-dmu", > - "clk-rx-icn-hva", > - "clk-icn-cpu", > - "clk-tx-icn-dmu", > - "clk-mmc-0", > - "clk-mmc-1", > - "clk-jpegdec", > - "clk-icn-reg", > - "clk-proc-bdisp-0", > - "clk-proc-bdisp-1", > - "clk-pp-dmu", > - "clk-vid-dmu", > - "clk-dss-lpc", > - "clk-st231-aud-0", > - "clk-st231-gp-1", > - "clk-st231-dmu", > - "clk-icn-lmi", > - "clk-tx-icn-1", > - "clk-icn-sbc", > - "clk-stfe-frc2", > - "clk-eth-phyref", > - "clk-eth-ref-phyclk", > - "clk-flash-promip", > - "clk-main-disp", > - "clk-aux-disp", > - "clk-compo-dvp", > - "clk-tx-icn-hades", > - "clk-rx-icn-hades", > - "clk-icn-reg-16", > - "clk-pp-hevc", > - "clk-clust-hevc", > - "clk-hwpe-hevc", > - "clk-fc-hevc", > - "clk-proc-mixer", > - "clk-proc-sc", > - "clk-avsp-hevc"; > - > /* > * ARM Peripheral clock for timers > */ > @@ -221,20 +175,13 @@ > > clk_s_d0_flexgen: clk-s-d0-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen-audio", "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih410-d0"; > > clocks = <&clk_s_d0_quadfs 0>, > <&clk_s_d0_quadfs 1>, > <&clk_s_d0_quadfs 2>, > <&clk_s_d0_quadfs 3>, > <&clk_sysin>; > - > - clock-output-names = "clk-pcm-0", > - "clk-pcm-1", > - "clk-pcm-2", > - "clk-spdiff", > - "clk-pcmr10-master", > - "clk-usb2-phy"; > }; > }; > > @@ -257,7 +204,7 @@ > > clk_s_d2_flexgen: clk-s-d2-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen-video", "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih418-d2"; > > clocks = <&clk_s_d2_quadfs 0>, > <&clk_s_d2_quadfs 1>, > @@ -266,30 +213,6 @@ > <&clk_sysin>, > <&clk_sysin>, > <&clk_tmdsout_hdmi>; > - > - clock-output-names = "clk-pix-main-disp", > - "", > - "", > - "", > - "", > - "clk-tmds-hdmi-div2", > - "clk-pix-aux-disp", > - "clk-denc", > - "clk-pix-hddac", > - "clk-hddac", > - "clk-sddac", > - "clk-pix-dvo", > - "clk-dvo", > - "clk-pix-hdmi", > - "clk-tmds-hdmi", > - "clk-ref-hdmiphy", > - "", "", "", "", "", > - "", "", "", "", "", > - "", "", "", "", "", > - "", "", "", "", "", > - "", "", "", "", "", > - "", "", "", "", "", > - "", "clk-vp9"; > }; > }; > > @@ -312,22 +235,13 @@ > > clk_s_d3_flexgen: clk-s-d3-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih407-d3"; > > clocks = <&clk_s_d3_quadfs 0>, > <&clk_s_d3_quadfs 1>, > <&clk_s_d3_quadfs 2>, > <&clk_s_d3_quadfs 3>, > <&clk_sysin>; > - > - clock-output-names = "clk-stfe-frc1", > - "clk-tsout-0", > - "clk-tsout-1", > - "clk-mchi", > - "clk-vsens-compo", > - "clk-frc1-remote", > - "clk-lpc-0", > - "clk-lpc-1"; > }; > }; > }; > Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi index 8fa092462102..35d12979cdf4 100644 --- a/arch/arm/boot/dts/stih418-clock.dtsi +++ b/arch/arm/boot/dts/stih418-clock.dtsi @@ -83,15 +83,12 @@ }; clk_s_a0_flexgen: clk-s-a0-flexgen { - compatible = "st,flexgen"; + compatible = "st,flexgen", "st,flexgen-stih410-a0"; #clock-cells = <1>; clocks = <&clk_s_a0_pll 0>, <&clk_sysin>; - - clock-output-names = "clk-ic-lmi0", - "clk-ic-lmi1"; }; }; @@ -132,7 +129,7 @@ clk_s_c0_flexgen: clk-s-c0-flexgen { #clock-cells = <1>; - compatible = "st,flexgen"; + compatible = "st,flexgen", "st,flexgen-stih418-c0"; clocks = <&clk_s_c0_pll0 0>, <&clk_s_c0_pll1 0>, @@ -142,49 +139,6 @@ <&clk_s_c0_quadfs 3>, <&clk_sysin>; - clock-output-names = "clk-icn-gpu", - "clk-fdma", - "clk-nand", - "clk-hva", - "clk-proc-stfe", - "clk-tp", - "clk-rx-icn-dmu", - "clk-rx-icn-hva", - "clk-icn-cpu", - "clk-tx-icn-dmu", - "clk-mmc-0", - "clk-mmc-1", - "clk-jpegdec", - "clk-icn-reg", - "clk-proc-bdisp-0", - "clk-proc-bdisp-1", - "clk-pp-dmu", - "clk-vid-dmu", - "clk-dss-lpc", - "clk-st231-aud-0", - "clk-st231-gp-1", - "clk-st231-dmu", - "clk-icn-lmi", - "clk-tx-icn-1", - "clk-icn-sbc", - "clk-stfe-frc2", - "clk-eth-phyref", - "clk-eth-ref-phyclk", - "clk-flash-promip", - "clk-main-disp", - "clk-aux-disp", - "clk-compo-dvp", - "clk-tx-icn-hades", - "clk-rx-icn-hades", - "clk-icn-reg-16", - "clk-pp-hevc", - "clk-clust-hevc", - "clk-hwpe-hevc", - "clk-fc-hevc", - "clk-proc-mixer", - "clk-proc-sc", - "clk-avsp-hevc"; - /* * ARM Peripheral clock for timers */ @@ -221,20 +175,13 @@ clk_s_d0_flexgen: clk-s-d0-flexgen { #clock-cells = <1>; - compatible = "st,flexgen-audio", "st,flexgen"; + compatible = "st,flexgen", "st,flexgen-stih410-d0"; clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_quadfs 1>, <&clk_s_d0_quadfs 2>, <&clk_s_d0_quadfs 3>, <&clk_sysin>; - - clock-output-names = "clk-pcm-0", - "clk-pcm-1", - "clk-pcm-2", - "clk-spdiff", - "clk-pcmr10-master", - "clk-usb2-phy"; }; }; @@ -257,7 +204,7 @@ clk_s_d2_flexgen: clk-s-d2-flexgen { #clock-cells = <1>; - compatible = "st,flexgen-video", "st,flexgen"; + compatible = "st,flexgen", "st,flexgen-stih418-d2"; clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>, @@ -266,30 +213,6 @@ <&clk_sysin>, <&clk_sysin>, <&clk_tmdsout_hdmi>; - - clock-output-names = "clk-pix-main-disp", - "", - "", - "", - "", - "clk-tmds-hdmi-div2", - "clk-pix-aux-disp", - "clk-denc", - "clk-pix-hddac", - "clk-hddac", - "clk-sddac", - "clk-pix-dvo", - "clk-dvo", - "clk-pix-hdmi", - "clk-tmds-hdmi", - "clk-ref-hdmiphy", - "", "", "", "", "", - "", "", "", "", "", - "", "", "", "", "", - "", "", "", "", "", - "", "", "", "", "", - "", "", "", "", "", - "", "clk-vp9"; }; }; @@ -312,22 +235,13 @@ clk_s_d3_flexgen: clk-s-d3-flexgen { #clock-cells = <1>; - compatible = "st,flexgen"; + compatible = "st,flexgen", "st,flexgen-stih407-d3"; clocks = <&clk_s_d3_quadfs 0>, <&clk_s_d3_quadfs 1>, <&clk_s_d3_quadfs 2>, <&clk_s_d3_quadfs 3>, <&clk_sysin>; - - clock-output-names = "clk-stfe-frc1", - "clk-tsout-0", - "clk-tsout-1", - "clk-mchi", - "clk-vsens-compo", - "clk-frc1-remote", - "clk-lpc-0", - "clk-lpc-1"; }; }; };
With the introduction of new flexgen compatible within the clk-flexgen driver, remove the clock-output-names entry from the flexgen nodes and set the new proper compatible corresponding. Signed-off-by: Alain Volmat <avolmat@me.com> --- arch/arm/boot/dts/stih418-clock.dtsi | 96 ++-------------------------- 1 file changed, 5 insertions(+), 91 deletions(-)