Message ID | 20210820074726.2860425-2-joel@jms.id.au (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | net: Add LiteETH network driver | expand |
Context | Check | Description |
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netdev/cover_letter | success | Link |
netdev/fixes_present | success | Link |
netdev/patch_count | success | Link |
netdev/tree_selection | success | Guessed tree name to be net-next |
netdev/subject_prefix | success | Link |
netdev/cc_maintainers | success | CCed 8 of 8 maintainers |
netdev/source_inline | success | Was 0 now: 0 |
netdev/verify_signedoff | success | Link |
netdev/module_param | success | Was 0 now: 0 |
netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
netdev/verify_fixes | success | Link |
netdev/checkpatch | warning | WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? |
netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
netdev/header_inline | success | Link |
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote: > LiteETH is a small footprint and configurable Ethernet core for FPGA > based system on chips. Hi Joel Just an FYI. DT is considered ABI. Once released, you should not be making changes which are not backwards compatible. All the PHY and MDIO properties you are adding here are unused in the driver. They all look sensible, and you should be able to make it work. But when you do come to make that implementation, this definition is the base of what you have to work with. Andrew
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote: > LiteETH is a small footprint and configurable Ethernet core for FPGA > based system on chips. > > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- > v2: > - Fix dtschema check warning relating to registers > - Add names to the registers to make it easier to distinguish which is > what region > - Add mdio description > - Includ ethernet-controller parent description > > .../bindings/net/litex,liteeth.yaml | 79 +++++++++++++++++++ > 1 file changed, 79 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml > > diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml > new file mode 100644 > index 000000000000..30f8f8b0b657 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml > @@ -0,0 +1,79 @@ > +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/litex,liteeth.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: LiteX LiteETH ethernet device > + > +maintainers: > + - Joel Stanley <joel@jms.id.au> > + > +description: | > + LiteETH is a small footprint and configurable Ethernet core for FPGA based > + system on chips. > + > + The hardware source is Open Source and can be found on at > + https://github.com/enjoy-digital/liteeth/. > + > +allOf: > + - $ref: ethernet-controller.yaml# > + > +properties: > + compatible: > + const: litex,liteeth > + > + reg: > + minItems: 3 > + items: > + - description: MAC registers > + - description: MDIO registers > + - description: Packet buffer > + > + reg-names: > + minItems: 3 Need to define the names here. > + > + interrupts: > + maxItems: 1 > + > + rx-fifo-depth: true > + tx-fifo-depth: true Needs a vendor prefix, type, description and constraints. > + mac-address: true > + local-mac-address: true > + phy-handle: true > + > + mdio: > + $ref: mdio.yaml# > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + mac: ethernet@8020000 { > + compatible = "litex,liteeth"; > + reg = <0x8021000 0x100>, > + <0x8020800 0x100>, > + <0x8030000 0x2000>; > + reg-names = "mac", "mdio", "buffer"; > + rx-fifo-depth = <1024>; > + tx-fifo-depth = <1024>; > + interrupts = <0x11 0x1>; > + phy-handle = <ð_phy>; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + eth_phy: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + }; > +... > + > +# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml : > -- > 2.32.0 > >
On Mon, 23 Aug 2021 at 18:44, Rob Herring <robh@kernel.org> wrote: > > On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote: > > + > > + interrupts: > > + maxItems: 1 > > + > > > + rx-fifo-depth: true > > + tx-fifo-depth: true > > Needs a vendor prefix, type, description and constraints. These are the standard properties from the ethernet-controller.yaml. I switched the driver to using those once I discovered they existed (v1 defined these in terms of slots, whereas the ethernet-controller bindings use bytes). Cheers, Joel
On Mon, Aug 23, 2021 at 10:52 PM Joel Stanley <joel@jms.id.au> wrote: > > On Mon, 23 Aug 2021 at 18:44, Rob Herring <robh@kernel.org> wrote: > > > > On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote: > > > > + > > > + interrupts: > > > + maxItems: 1 > > > + > > > > > + rx-fifo-depth: true > > > + tx-fifo-depth: true > > > > Needs a vendor prefix, type, description and constraints. > > These are the standard properties from the ethernet-controller.yaml. I > switched the driver to using those once I discovered they existed (v1 > defined these in terms of slots, whereas the ethernet-controller > bindings use bytes). Indeed (grepping the wrong repo didn't work too well :) ). Still, I'd assume there's some valid range for this h/w you can define? Or 0 - 2^32 is valid? Rob
On Tue, 24 Aug 2021 at 11:52, Rob Herring <robh@kernel.org> wrote: > > On Mon, Aug 23, 2021 at 10:52 PM Joel Stanley <joel@jms.id.au> wrote: > > > > On Mon, 23 Aug 2021 at 18:44, Rob Herring <robh@kernel.org> wrote: > > > > > > On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote: > > > > > > + > > > > + interrupts: > > > > + maxItems: 1 > > > > + > > > > > > > + rx-fifo-depth: true > > > > + tx-fifo-depth: true > > > > > > Needs a vendor prefix, type, description and constraints. > > > > These are the standard properties from the ethernet-controller.yaml. I > > switched the driver to using those once I discovered they existed (v1 > > defined these in terms of slots, whereas the ethernet-controller > > bindings use bytes). > > Indeed (grepping the wrong repo didn't work too well :) ). > > Still, I'd assume there's some valid range for this h/w you can > define? Or 0 - 2^32 is valid? 0 would be problematic, but there's not really any bound on it. I'll send a v3 with the reg-names documented. Thanks for the review. Cheers, Joel
diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml new file mode 100644 index 000000000000..30f8f8b0b657 --- /dev/null +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/litex,liteeth.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LiteX LiteETH ethernet device + +maintainers: + - Joel Stanley <joel@jms.id.au> + +description: | + LiteETH is a small footprint and configurable Ethernet core for FPGA based + system on chips. + + The hardware source is Open Source and can be found on at + https://github.com/enjoy-digital/liteeth/. + +allOf: + - $ref: ethernet-controller.yaml# + +properties: + compatible: + const: litex,liteeth + + reg: + minItems: 3 + items: + - description: MAC registers + - description: MDIO registers + - description: Packet buffer + + reg-names: + minItems: 3 + + interrupts: + maxItems: 1 + + rx-fifo-depth: true + tx-fifo-depth: true + mac-address: true + local-mac-address: true + phy-handle: true + + mdio: + $ref: mdio.yaml# + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + mac: ethernet@8020000 { + compatible = "litex,liteeth"; + reg = <0x8021000 0x100>, + <0x8020800 0x100>, + <0x8030000 0x2000>; + reg-names = "mac", "mdio", "buffer"; + rx-fifo-depth = <1024>; + tx-fifo-depth = <1024>; + interrupts = <0x11 0x1>; + phy-handle = <ð_phy>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + reg = <0>; + }; + }; + }; +... + +# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :
LiteETH is a small footprint and configurable Ethernet core for FPGA based system on chips. Signed-off-by: Joel Stanley <joel@jms.id.au> --- v2: - Fix dtschema check warning relating to registers - Add names to the registers to make it easier to distinguish which is what region - Add mdio description - Includ ethernet-controller parent description .../bindings/net/litex,liteeth.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml