diff mbox series

[v6,1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()

Message ID 20210819184835.1181323-2-juston.li@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/hdcp: HDCP2.2 MST dock fixes | expand

Commit Message

Juston Li Aug. 19, 2021, 6:48 p.m. UTC 
Update cp_irq_count_cached when reading messages rather than when
writing a message to make sure the value is up to date and not
stale from a previously handled CP_IRQ.

AKE flow  doesn't always respond to a read with a ACK write msg.
E.g. AKE_Send_Pairing_Info will "timeout" because we received
a CP_IRQ for reading AKE_Send_H_Prime but no write occurred between that
and reading AKE_Send_Pairing_Info so cp_irq_count_cached is stale
causing the wait to return right away rather than waiting for a new
CP_IRQ.

Signed-off-by: Juston Li <juston.li@intel.com>
Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Gupta, Anshuman Sept. 2, 2021, 1:08 p.m. UTC | #1 
> -----Original Message-----
> From: Li, Juston <juston.li@intel.com>
> Sent: Friday, August 20, 2021 12:19 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Gupta, Anshuman <anshuman.gupta@intel.com>;
> C, Ramalingam <ramalingam.c@intel.com>; Vivi, Rodrigo
> <rodrigo.vivi@intel.com>; Li, Juston <juston.li@intel.com>
> Subject: [Intel-gfx] [PATCH v6 1/3] drm/i915/hdcp: update cp_irq_count_cached
> in intel_dp_hdcp2_read_msg()
> 
> Update cp_irq_count_cached when reading messages rather than when writing
> a message to make sure the value is up to date and not stale from a previously
> handled CP_IRQ.
> 
> AKE flow  doesn't always respond to a read with a ACK write msg.
> E.g. AKE_Send_Pairing_Info will "timeout" because we received a CP_IRQ for
> reading AKE_Send_H_Prime but no write occurred between that and reading
> AKE_Send_Pairing_Info so cp_irq_count_cached is stale causing the wait to
> return right away rather than waiting for a new CP_IRQ.
> 
> Signed-off-by: Juston Li <juston.li@intel.com>
> Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Hi Suraj,
We don't have HDCP coverage in CI
Could you please provide your Tested-By tag after testing this patch series.
Br,
Anshuman 
> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index d697d169e8c1..1d0096654776 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -446,8 +446,6 @@ static
>  int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
>  			     void *buf, size_t size)
>  {
> -	struct intel_dp *dp = &dig_port->dp;
> -	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
>  	unsigned int offset;
>  	u8 *byte = buf;
>  	ssize_t ret, bytes_to_write, len;
> @@ -463,8 +461,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port
> *dig_port,
>  	bytes_to_write = size - 1;
>  	byte++;
> 
> -	hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
> -
>  	while (bytes_to_write) {
>  		len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
>  				DP_AUX_MAX_PAYLOAD_BYTES :
> bytes_to_write; @@ -530,6 +526,8 @@ int intel_dp_hdcp2_read_msg(struct
> intel_digital_port *dig_port,
>  			    u8 msg_id, void *buf, size_t size)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_dp *dp = &dig_port->dp;
> +	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
>  	unsigned int offset;
>  	u8 *byte = buf;
>  	ssize_t ret, bytes_to_recv, len;
> @@ -546,6 +544,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port
> *dig_port,
>  	if (ret < 0)
>  		return ret;
> 
> +	hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
> +
>  	if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
>  		ret = get_receiver_id_list_size(dig_port);
>  		if (ret < 0)
> --
> 2.31.1
Suraj Kandpal Sept. 3, 2021, 5:23 a.m. UTC | #2 
Hi ,

I have tested the patch 20856 against ci_drm_10499 and the patch 20921 against ci_drm_10537 kernel using the IGT kms_test_protection test on TGL platform with the following setups:
- HCDP2.2 Monitor connected to HDCP 2.2 Monitor
- HCDP2.2 Monitor connected to HDCP 1.4 Monitor
- HCDP1.4 Monitor connected to HDCP 1.4 Monitor
- HCDP2.2 Monitor standalone
- HDCP1.4 Monitor standalone 

I did not see any delta between the Patchwork and CI_DRM kernel and all DP MST Scenarios seem to work fine. We can go ahead and merge this patch.

 
Tested-by: Suraj K <suraj.kandpal@intel.com>

-----Original Message-----
From: Gupta, Anshuman <anshuman.gupta@intel.com> 
Sent: Thursday, September 2, 2021 6:38 PM
To: Li, Juston <juston.li@intel.com>; intel-gfx@lists.freedesktop.org; Kandpal, Suraj <suraj.kandpal@intel.com>
Cc: seanpaul@chromium.org; C, Ramalingam <ramalingam.c@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
Subject: RE: [Intel-gfx] [PATCH v6 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()



> -----Original Message-----
> From: Li, Juston <juston.li@intel.com>
> Sent: Friday, August 20, 2021 12:19 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Gupta, Anshuman <anshuman.gupta@intel.com>; 
> C, Ramalingam <ramalingam.c@intel.com>; Vivi, Rodrigo 
> <rodrigo.vivi@intel.com>; Li, Juston <juston.li@intel.com>
> Subject: [Intel-gfx] [PATCH v6 1/3] drm/i915/hdcp: update 
> cp_irq_count_cached in intel_dp_hdcp2_read_msg()
> 
> Update cp_irq_count_cached when reading messages rather than when 
> writing a message to make sure the value is up to date and not stale 
> from a previously handled CP_IRQ.
> 
> AKE flow  doesn't always respond to a read with a ACK write msg.
> E.g. AKE_Send_Pairing_Info will "timeout" because we received a CP_IRQ 
> for reading AKE_Send_H_Prime but no write occurred between that and 
> reading AKE_Send_Pairing_Info so cp_irq_count_cached is stale causing 
> the wait to return right away rather than waiting for a new CP_IRQ.
> 
> Signed-off-by: Juston Li <juston.li@intel.com>
> Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Hi Suraj,
We don't have HDCP coverage in CI
Could you please provide your Tested-By tag after testing this patch series.
Br,
Anshuman 
> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index d697d169e8c1..1d0096654776 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -446,8 +446,6 @@ static
>  int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
>       void *buf, size_t size)
>  {
> -struct intel_dp *dp = &dig_port->dp;
> -struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;  unsigned 
> int offset;
>  u8 *byte = buf;
>  ssize_t ret, bytes_to_write, len;
> @@ -463,8 +461,6 @@ int intel_dp_hdcp2_write_msg(struct 
> intel_digital_port *dig_port,  bytes_to_write = size - 1;  byte++;
> 
> -hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
> -
>  while (bytes_to_write) {
>  len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
>  DP_AUX_MAX_PAYLOAD_BYTES :
> bytes_to_write; @@ -530,6 +526,8 @@ int intel_dp_hdcp2_read_msg(struct 
> intel_digital_port *dig_port,
>      u8 msg_id, void *buf, size_t size)  {  struct drm_i915_private 
> *i915 = to_i915(dig_port->base.base.dev);
> +struct intel_dp *dp = &dig_port->dp;
> +struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
>  unsigned int offset;
>  u8 *byte = buf;
>  ssize_t ret, bytes_to_recv, len;
> @@ -546,6 +544,8 @@ int intel_dp_hdcp2_read_msg(struct 
> intel_digital_port *dig_port,  if (ret < 0)  return ret;
> 
> +hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
> +
>  if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {  ret = 
> get_receiver_id_list_size(dig_port);
>  if (ret < 0)
> --
> 2.31.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index d697d169e8c1..1d0096654776 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -446,8 +446,6 @@  static
 int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
 			     void *buf, size_t size)
 {
-	struct intel_dp *dp = &dig_port->dp;
-	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
 	unsigned int offset;
 	u8 *byte = buf;
 	ssize_t ret, bytes_to_write, len;
@@ -463,8 +461,6 @@  int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
 	bytes_to_write = size - 1;
 	byte++;
 
-	hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
-
 	while (bytes_to_write) {
 		len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
 				DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
@@ -530,6 +526,8 @@  int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
 			    u8 msg_id, void *buf, size_t size)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_dp *dp = &dig_port->dp;
+	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
 	unsigned int offset;
 	u8 *byte = buf;
 	ssize_t ret, bytes_to_recv, len;
@@ -546,6 +544,8 @@  int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
 	if (ret < 0)
 		return ret;
 
+	hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
+
 	if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
 		ret = get_receiver_id_list_size(dig_port);
 		if (ret < 0)