| Message ID | 20210906184333.1855426-1-l.stach@pengutronix.de (mailing list archive) |
|---|---|
| Headers | show |
| Series | i.MX8MM GPC improvements and BLK_CTRL driver | expand |
Hi Lucas, On Mon, Sep 6, 2021 at 3:43 PM Lucas Stach <l.stach@pengutronix.de> wrote: > > Hi all, > > third revision of the GPC improvements and BLK_CTRL driver to enable > all power domains on the i.MX8MM. Frieder is still hunting some > sporadic and hard to reproduce issues and I currently don't have much > time to help with that. Meanwhile here's a new revision with the > obvious issues (DT binding validation fail) fixed to allow people to > review the code, so we hopefully don't miss the next merge window again. > > I guess it would even be possible to merge the series with the > sporadic issues still present, as it seems a lot of people are waiting > for this to land, as it's blocking lots of other work. Agreed, thanks!
On 06.09.21 21:01, Fabio Estevam wrote: > Hi Lucas, > > On Mon, Sep 6, 2021 at 3:43 PM Lucas Stach <l.stach@pengutronix.de> wrote: >> >> Hi all, >> >> third revision of the GPC improvements and BLK_CTRL driver to enable >> all power domains on the i.MX8MM. Frieder is still hunting some >> sporadic and hard to reproduce issues and I currently don't have much >> time to help with that. Meanwhile here's a new revision with the >> obvious issues (DT binding validation fail) fixed to allow people to >> review the code, so we hopefully don't miss the next merge window again. >> >> I guess it would even be possible to merge the series with the >> sporadic issues still present, as it seems a lot of people are waiting >> for this to land, as it's blocking lots of other work. > > Agreed, thanks! Also agree. I think we should try to merge this even if the rare/sporadic issues are not fixed.
Hi all, third revision of the GPC improvements and BLK_CTRL driver to enable all power domains on the i.MX8MM. Frieder is still hunting some sporadic and hard to reproduce issues and I currently don't have much time to help with that. Meanwhile here's a new revision with the obvious issues (DT binding validation fail) fixed to allow people to review the code, so we hopefully don't miss the next merge window again. I guess it would even be possible to merge the series with the sporadic issues still present, as it seems a lot of people are waiting for this to land, as it's blocking lots of other work. Regards, Lucas Frieder Schrempf (1): arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core Lucas Stach (15): Revert "soc: imx: gpcv2: move reset assert after requesting domain power up" soc: imx: gpcv2: add lockdep annotation soc: imx: gpcv2: add domain option to keep domain clocks enabled soc: imx: gpcv2: keep i.MX8M* bus clocks enabled soc: imx: gpcv2: support system suspend/resume dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains soc: imx: add i.MX8M blk-ctrl driver dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl arm64: dts: imx8mm: add GPC node arm64: dts: imx8mm: put USB controllers into power-domains arm64: dts: imx8mm: add VPU blk-ctrl arm64: dts: imx8mm: add DISP blk-ctrl Marek Vasut (2): soc: imx: gpcv2: Turn domain->pgc into bitfield soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain .../soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml | 94 ++++ .../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 76 +++ arch/arm64/boot/dts/freescale/imx8mm.dtsi | 180 ++++++ drivers/soc/imx/Makefile | 1 + drivers/soc/imx/gpcv2.c | 130 +++-- drivers/soc/imx/imx8m-blk-ctrl.c | 525 ++++++++++++++++++ include/dt-bindings/power/imx8mm-power.h | 9 + 7 files changed, 974 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml create mode 100644 drivers/soc/imx/imx8m-blk-ctrl.c