| Message ID | 20210908003944.2972024-20-airlied@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i915/display: split and constify vtable | expand |
On Wed, 08 Sep 2021, Dave Airlie <airlied@gmail.com> wrote: > From: Dave Airlie <airlied@redhat.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > --- > drivers/gpu/drm/i915/display/intel_display.c | 81 ++++++++++++-------- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > 2 files changed, 52 insertions(+), 31 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 09c9dc741026..20fd35c6858c 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3736,7 +3736,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, > > drm_WARN_ON(&dev_priv->drm, IS_ERR(temp_crtc_state) || ret); > > - dev_priv->display.crtc_disable(to_intel_atomic_state(state), crtc); > + dev_priv->display->crtc_disable(to_intel_atomic_state(state), crtc); > > drm_atomic_state_put(state); > > @@ -5941,7 +5941,7 @@ static bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state) > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *i915 = to_i915(crtc->base.dev); > > - if (!i915->display.get_pipe_config(crtc, crtc_state)) > + if (!i915->display->get_pipe_config(crtc, crtc_state)) > return false; > > crtc_state->hw.active = true; > @@ -9778,7 +9778,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, > > intel_crtc_update_active_timings(new_crtc_state); > > - dev_priv->display.crtc_enable(state, crtc); > + dev_priv->display->crtc_enable(state, crtc); > > if (new_crtc_state->bigjoiner_slave) > return; > @@ -9866,7 +9866,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state, > */ > intel_crtc_disable_pipe_crc(crtc); > > - dev_priv->display.crtc_disable(state, crtc); > + dev_priv->display->crtc_disable(state, crtc); > crtc->active = false; > intel_fbc_disable(crtc); > intel_disable_shared_dpll(old_crtc_state); > @@ -10246,7 +10246,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > } > > /* Now enable the clocks, plane, pipe, and connectors that we set up. */ > - dev_priv->display.commit_modeset_enables(state); > + dev_priv->display->commit_modeset_enables(state); > > if (state->modeset) { > intel_encoders_update_complete(state); > @@ -11250,6 +11250,46 @@ static const struct drm_mode_config_funcs intel_mode_funcs = { > .atomic_state_free = intel_atomic_state_free, > }; > > +static const struct drm_i915_display_funcs skl_display_funcs = { > + .get_pipe_config = hsw_get_pipe_config, > + .crtc_enable = hsw_crtc_enable, > + .crtc_disable = hsw_crtc_disable, > + .commit_modeset_enables = skl_commit_modeset_enables, > + .get_initial_plane_config = skl_get_initial_plane_config, > +}; > + > +static const struct drm_i915_display_funcs ddi_display_funcs = { > + .get_pipe_config = hsw_get_pipe_config, > + .crtc_enable = hsw_crtc_enable, > + .crtc_disable = hsw_crtc_disable, > + .commit_modeset_enables = intel_commit_modeset_enables, > + .get_initial_plane_config = i9xx_get_initial_plane_config, > +}; > + > +static const struct drm_i915_display_funcs pch_split_display_funcs = { > + .get_pipe_config = ilk_get_pipe_config, > + .crtc_enable = ilk_crtc_enable, > + .crtc_disable = ilk_crtc_disable, > + .commit_modeset_enables = intel_commit_modeset_enables, > + .get_initial_plane_config = i9xx_get_initial_plane_config, > +}; > + > +static const struct drm_i915_display_funcs vlv_display_funcs = { > + .get_pipe_config = i9xx_get_pipe_config, > + .crtc_enable = valleyview_crtc_enable, > + .crtc_disable = i9xx_crtc_disable, > + .commit_modeset_enables = intel_commit_modeset_enables, > + .get_initial_plane_config = i9xx_get_initial_plane_config, > +}; > + > +static const struct drm_i915_display_funcs i9xx_display_funcs = { > + .get_pipe_config = i9xx_get_pipe_config, > + .crtc_enable = i9xx_crtc_enable, > + .crtc_disable = i9xx_crtc_disable, > + .commit_modeset_enables = intel_commit_modeset_enables, > + .get_initial_plane_config = i9xx_get_initial_plane_config, > +}; > + > /** > * intel_init_display_hooks - initialize the display modesetting hooks > * @dev_priv: device private > @@ -11265,38 +11305,19 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv) > intel_dpll_init_clock_hook(dev_priv); > > if (DISPLAY_VER(dev_priv) >= 9) { > - dev_priv->display.get_pipe_config = hsw_get_pipe_config; > - dev_priv->display.crtc_enable = hsw_crtc_enable; > - dev_priv->display.crtc_disable = hsw_crtc_disable; > + dev_priv->display = &skl_display_funcs; > } else if (HAS_DDI(dev_priv)) { > - dev_priv->display.get_pipe_config = hsw_get_pipe_config; > - dev_priv->display.crtc_enable = hsw_crtc_enable; > - dev_priv->display.crtc_disable = hsw_crtc_disable; > + dev_priv->display = &ddi_display_funcs; > } else if (HAS_PCH_SPLIT(dev_priv)) { > - dev_priv->display.get_pipe_config = ilk_get_pipe_config; > - dev_priv->display.crtc_enable = ilk_crtc_enable; > - dev_priv->display.crtc_disable = ilk_crtc_disable; > + dev_priv->display = &pch_split_display_funcs; > } else if (IS_CHERRYVIEW(dev_priv) || > IS_VALLEYVIEW(dev_priv)) { > - dev_priv->display.get_pipe_config = i9xx_get_pipe_config; > - dev_priv->display.crtc_enable = valleyview_crtc_enable; > - dev_priv->display.crtc_disable = i9xx_crtc_disable; > + dev_priv->display = &vlv_display_funcs; > } else { > - dev_priv->display.get_pipe_config = i9xx_get_pipe_config; > - dev_priv->display.crtc_enable = i9xx_crtc_enable; > - dev_priv->display.crtc_disable = i9xx_crtc_disable; > + dev_priv->display = &i9xx_display_funcs; > } > > intel_fdi_init_hook(dev_priv); > - > - if (DISPLAY_VER(dev_priv) >= 9) { > - dev_priv->display.commit_modeset_enables = skl_commit_modeset_enables; > - dev_priv->display.get_initial_plane_config = skl_get_initial_plane_config; > - } else { > - dev_priv->display.commit_modeset_enables = intel_commit_modeset_enables; > - dev_priv->display.get_initial_plane_config = i9xx_get_initial_plane_config; > - } > - > } > > void intel_modeset_init_hw(struct drm_i915_private *i915) > @@ -11723,7 +11744,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915) > * can even allow for smooth boot transitions if the BIOS > * fb is large enough for the active pipe configuration. > */ > - i915->display.get_initial_plane_config(crtc, &plane_config); > + i915->display->get_initial_plane_config(crtc, &plane_config); > > /* > * If the fb is shared between multiple heads, we'll > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2231b93c2111..fbcafc7cc075 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1005,7 +1005,7 @@ struct drm_i915_private { > const struct drm_i915_dpll_funcs *dpll_funcs; > > /* Display functions */ > - struct drm_i915_display_funcs display; > + const struct drm_i915_display_funcs *display; > > /* Display internal color functions */ > const struct drm_i915_display_color_funcs *color_funcs;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 09c9dc741026..20fd35c6858c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3736,7 +3736,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, drm_WARN_ON(&dev_priv->drm, IS_ERR(temp_crtc_state) || ret); - dev_priv->display.crtc_disable(to_intel_atomic_state(state), crtc); + dev_priv->display->crtc_disable(to_intel_atomic_state(state), crtc); drm_atomic_state_put(state); @@ -5941,7 +5941,7 @@ static bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); - if (!i915->display.get_pipe_config(crtc, crtc_state)) + if (!i915->display->get_pipe_config(crtc, crtc_state)) return false; crtc_state->hw.active = true; @@ -9778,7 +9778,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, intel_crtc_update_active_timings(new_crtc_state); - dev_priv->display.crtc_enable(state, crtc); + dev_priv->display->crtc_enable(state, crtc); if (new_crtc_state->bigjoiner_slave) return; @@ -9866,7 +9866,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state, */ intel_crtc_disable_pipe_crc(crtc); - dev_priv->display.crtc_disable(state, crtc); + dev_priv->display->crtc_disable(state, crtc); crtc->active = false; intel_fbc_disable(crtc); intel_disable_shared_dpll(old_crtc_state); @@ -10246,7 +10246,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) } /* Now enable the clocks, plane, pipe, and connectors that we set up. */ - dev_priv->display.commit_modeset_enables(state); + dev_priv->display->commit_modeset_enables(state); if (state->modeset) { intel_encoders_update_complete(state); @@ -11250,6 +11250,46 @@ static const struct drm_mode_config_funcs intel_mode_funcs = { .atomic_state_free = intel_atomic_state_free, }; +static const struct drm_i915_display_funcs skl_display_funcs = { + .get_pipe_config = hsw_get_pipe_config, + .crtc_enable = hsw_crtc_enable, + .crtc_disable = hsw_crtc_disable, + .commit_modeset_enables = skl_commit_modeset_enables, + .get_initial_plane_config = skl_get_initial_plane_config, +}; + +static const struct drm_i915_display_funcs ddi_display_funcs = { + .get_pipe_config = hsw_get_pipe_config, + .crtc_enable = hsw_crtc_enable, + .crtc_disable = hsw_crtc_disable, + .commit_modeset_enables = intel_commit_modeset_enables, + .get_initial_plane_config = i9xx_get_initial_plane_config, +}; + +static const struct drm_i915_display_funcs pch_split_display_funcs = { + .get_pipe_config = ilk_get_pipe_config, + .crtc_enable = ilk_crtc_enable, + .crtc_disable = ilk_crtc_disable, + .commit_modeset_enables = intel_commit_modeset_enables, + .get_initial_plane_config = i9xx_get_initial_plane_config, +}; + +static const struct drm_i915_display_funcs vlv_display_funcs = { + .get_pipe_config = i9xx_get_pipe_config, + .crtc_enable = valleyview_crtc_enable, + .crtc_disable = i9xx_crtc_disable, + .commit_modeset_enables = intel_commit_modeset_enables, + .get_initial_plane_config = i9xx_get_initial_plane_config, +}; + +static const struct drm_i915_display_funcs i9xx_display_funcs = { + .get_pipe_config = i9xx_get_pipe_config, + .crtc_enable = i9xx_crtc_enable, + .crtc_disable = i9xx_crtc_disable, + .commit_modeset_enables = intel_commit_modeset_enables, + .get_initial_plane_config = i9xx_get_initial_plane_config, +}; + /** * intel_init_display_hooks - initialize the display modesetting hooks * @dev_priv: device private @@ -11265,38 +11305,19 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv) intel_dpll_init_clock_hook(dev_priv); if (DISPLAY_VER(dev_priv) >= 9) { - dev_priv->display.get_pipe_config = hsw_get_pipe_config; - dev_priv->display.crtc_enable = hsw_crtc_enable; - dev_priv->display.crtc_disable = hsw_crtc_disable; + dev_priv->display = &skl_display_funcs; } else if (HAS_DDI(dev_priv)) { - dev_priv->display.get_pipe_config = hsw_get_pipe_config; - dev_priv->display.crtc_enable = hsw_crtc_enable; - dev_priv->display.crtc_disable = hsw_crtc_disable; + dev_priv->display = &ddi_display_funcs; } else if (HAS_PCH_SPLIT(dev_priv)) { - dev_priv->display.get_pipe_config = ilk_get_pipe_config; - dev_priv->display.crtc_enable = ilk_crtc_enable; - dev_priv->display.crtc_disable = ilk_crtc_disable; + dev_priv->display = &pch_split_display_funcs; } else if (IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv)) { - dev_priv->display.get_pipe_config = i9xx_get_pipe_config; - dev_priv->display.crtc_enable = valleyview_crtc_enable; - dev_priv->display.crtc_disable = i9xx_crtc_disable; + dev_priv->display = &vlv_display_funcs; } else { - dev_priv->display.get_pipe_config = i9xx_get_pipe_config; - dev_priv->display.crtc_enable = i9xx_crtc_enable; - dev_priv->display.crtc_disable = i9xx_crtc_disable; + dev_priv->display = &i9xx_display_funcs; } intel_fdi_init_hook(dev_priv); - - if (DISPLAY_VER(dev_priv) >= 9) { - dev_priv->display.commit_modeset_enables = skl_commit_modeset_enables; - dev_priv->display.get_initial_plane_config = skl_get_initial_plane_config; - } else { - dev_priv->display.commit_modeset_enables = intel_commit_modeset_enables; - dev_priv->display.get_initial_plane_config = i9xx_get_initial_plane_config; - } - } void intel_modeset_init_hw(struct drm_i915_private *i915) @@ -11723,7 +11744,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915) * can even allow for smooth boot transitions if the BIOS * fb is large enough for the active pipe configuration. */ - i915->display.get_initial_plane_config(crtc, &plane_config); + i915->display->get_initial_plane_config(crtc, &plane_config); /* * If the fb is shared between multiple heads, we'll diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2231b93c2111..fbcafc7cc075 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1005,7 +1005,7 @@ struct drm_i915_private { const struct drm_i915_dpll_funcs *dpll_funcs; /* Display functions */ - struct drm_i915_display_funcs display; + const struct drm_i915_display_funcs *display; /* Display internal color functions */ const struct drm_i915_display_color_funcs *color_funcs;
From: Dave Airlie <airlied@redhat.com> --- drivers/gpu/drm/i915/display/intel_display.c | 81 ++++++++++++-------- drivers/gpu/drm/i915/i915_drv.h | 2 +- 2 files changed, 52 insertions(+), 31 deletions(-)