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[v9,0/9] GICv3 LPI and ITS feature implementation

Message ID 20210910143951.92242-1-shashi.mallela@linaro.org (mailing list archive)
Headers show
Series GICv3 LPI and ITS feature implementation | expand

Message

Shashi Mallela Sept. 10, 2021, 2:39 p.m. UTC 
This patchset implements qemu device model for enabling physical
LPI support and ITS functionality in GIC as per GICv3 specification.
Both flat table and 2 level tables are implemented.The ITS commands
for adding/deleting ITS table entries,trigerring LPI interrupts are
implemented.Translated LPI interrupt ids are processed by redistributor
to determine priority and set pending state appropriately before
forwarding the same to cpu interface.
The ITS feature support has been added to virt platform,wherein the
emulated functionality co-exists with kvm kernel functionality.

Changes in v9:
 - removed sbsa-ref patch due to inconclusive ongoing discussion
   regarding ITS placement and version in sbsa-ref platform.This will be
   taken up as a separate functionality later
 - updated its enable code as per latest virt 6.2
 - updated its code to replace usage of MEMTX_ with bool
 - All kvm_unit_tests PASS
 - Verified Linux Boot functionality

Shashi Mallela (9):
  hw/intc: GICv3 ITS initial framework
  hw/intc: GICv3 ITS register definitions added
  hw/intc: GICv3 ITS command queue framework
  hw/intc: GICv3 ITS Command processing
  hw/intc: GICv3 ITS Feature enablement
  hw/intc: GICv3 redistributor ITS processing
  tests/data/acpi/virt: Add IORT files for ITS
  hw/arm/virt: add ITS support in virt GIC
  tests/data/acpi/virt: Update IORT files for ITS

 hw/arm/virt.c                          |   29 +-
 hw/intc/arm_gicv3.c                    |   14 +
 hw/intc/arm_gicv3_common.c             |   13 +
 hw/intc/arm_gicv3_cpuif.c              |    7 +-
 hw/intc/arm_gicv3_dist.c               |    5 +-
 hw/intc/arm_gicv3_its.c                | 1322 ++++++++++++++++++++++++
 hw/intc/arm_gicv3_its_common.c         |    7 +-
 hw/intc/arm_gicv3_its_kvm.c            |    2 +-
 hw/intc/arm_gicv3_redist.c             |  153 ++-
 hw/intc/gicv3_internal.h               |  188 +++-
 hw/intc/meson.build                    |    1 +
 include/hw/arm/virt.h                  |    2 +
 include/hw/intc/arm_gicv3_common.h     |   13 +
 include/hw/intc/arm_gicv3_its_common.h |   32 +-
 target/arm/kvm_arm.h                   |    4 +-
 tests/data/acpi/virt/IORT              |  Bin 0 -> 124 bytes
 tests/data/acpi/virt/IORT.memhp        |  Bin 0 -> 124 bytes
 tests/data/acpi/virt/IORT.numamem      |  Bin 0 -> 124 bytes
 tests/data/acpi/virt/IORT.pxb          |  Bin 0 -> 124 bytes
 19 files changed, 1768 insertions(+), 24 deletions(-)
 create mode 100644 hw/intc/arm_gicv3_its.c
 create mode 100644 tests/data/acpi/virt/IORT
 create mode 100644 tests/data/acpi/virt/IORT.memhp
 create mode 100644 tests/data/acpi/virt/IORT.numamem
 create mode 100644 tests/data/acpi/virt/IORT.pxb

--
2.27.0

Comments

Peter Maydell Sept. 13, 2021, 1:04 p.m. UTC | #1 
On Fri, 10 Sept 2021 at 15:39, Shashi Mallela <shashi.mallela@linaro.org> wrote:
>
> This patchset implements qemu device model for enabling physical
> LPI support and ITS functionality in GIC as per GICv3 specification.
> Both flat table and 2 level tables are implemented.The ITS commands
> for adding/deleting ITS table entries,trigerring LPI interrupts are
> implemented.Translated LPI interrupt ids are processed by redistributor
> to determine priority and set pending state appropriately before
> forwarding the same to cpu interface.
> The ITS feature support has been added to virt platform,wherein the
> emulated functionality co-exists with kvm kernel functionality.
>
> Changes in v9:
>  - removed sbsa-ref patch due to inconclusive ongoing discussion
>    regarding ITS placement and version in sbsa-ref platform.This will be
>    taken up as a separate functionality later
>  - updated its enable code as per latest virt 6.2
>  - updated its code to replace usage of MEMTX_ with bool
>  - All kvm_unit_tests PASS
>  - Verified Linux Boot functionality
>
> Shashi Mallela (9):
>   hw/intc: GICv3 ITS initial framework
>   hw/intc: GICv3 ITS register definitions added
>   hw/intc: GICv3 ITS command queue framework
>   hw/intc: GICv3 ITS Command processing
>   hw/intc: GICv3 ITS Feature enablement
>   hw/intc: GICv3 redistributor ITS processing
>   tests/data/acpi/virt: Add IORT files for ITS
>   hw/arm/virt: add ITS support in virt GIC
>   tests/data/acpi/virt: Update IORT files for ITS



Applied to target-arm.next, thanks.

-- PMM