diff mbox series

[6/8] dt-bindings: clocks: qcom,gcc-msm8998: Reflect actually referenced clks

Message ID 20210911121340.261920-7-marijn.suijten@somainline.org (mailing list archive)
State Not Applicable
Headers show
Series msm8998 clock-controller cleanup | expand

Commit Message

Marijn Suijten Sept. 11, 2021, 12:13 p.m. UTC
Some of these clocks are not referenced by the driver at all whereas
aud_ref_clk and core_bi_pll_test_se are but were missing from the
bindings.  These clocks are optional (and not currently provided
anywhere) while "xo" and "sleep_clk" are mandatory.

Note that none of these clocks were used beforehand as the driver
referenced them by their global name.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 .../bindings/clock/qcom,gcc-msm8998.yaml      | 26 ++++++-------------
 1 file changed, 8 insertions(+), 18 deletions(-)

Comments

Stephen Boyd Sept. 14, 2021, 9:42 p.m. UTC | #1
Quoting Marijn Suijten (2021-09-11 05:13:38)
> Some of these clocks are not referenced by the driver at all whereas
> aud_ref_clk and core_bi_pll_test_se are but were missing from the
> bindings.  These clocks are optional (and not currently provided
> anywhere) while "xo" and "sleep_clk" are mandatory.
> 
> Note that none of these clocks were used beforehand as the driver
> referenced them by their global name.
> 
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> ---

Applied to clk-next
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
index a0bb713929b0..8151c0a05649 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
@@ -25,21 +25,17 @@  properties:
     items:
       - description: Board XO source
       - description: Sleep clock source
-      - description: USB 3.0 phy pipe clock
-      - description: UFS phy rx symbol clock for pipe 0
-      - description: UFS phy rx symbol clock for pipe 1
-      - description: UFS phy tx symbol clock
-      - description: PCIE phy pipe clock
+      - description: Audio reference clock (Optional clock)
+      - description: PLL test clock source (Optional clock)
+    minItems: 2
 
   clock-names:
     items:
       - const: xo
       - const: sleep_clk
-      - const: usb3_pipe
-      - const: ufs_rx_symbol0
-      - const: ufs_rx_symbol1
-      - const: ufs_tx_symbol0
-      - const: pcie0_pipe
+      - const: aud_ref_clk # Optional clock
+      - const: core_bi_pll_test_se # Optional clock
+    minItems: 2
 
   '#clock-cells':
     const: 1
@@ -80,16 +76,10 @@  examples:
       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                <&sleep>,
                <0>,
-               <0>,
-               <0>,
-               <0>,
                <0>;
       clock-names = "xo",
                     "sleep_clk",
-                    "usb3_pipe",
-                    "ufs_rx_symbol0",
-                    "ufs_rx_symbol1",
-                    "ufs_tx_symbol0",
-                    "pcie0_pipe";
+                    "aud_ref_clk",
+                    "core_bi_pll_test_se";
     };
 ...