| Message ID | 1629887818-28489-1-git-send-email-rnayak@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: dts: qcom: sc7280: Define CPU topology | expand |
Quoting Rajendra Nayak (2021-08-25 03:36:58) > sc7280 has 8 big.LITTLE CPUs setup with DynamIQ, so all cores are > within the same CPU cluster. Add cpu-map to define the CPU topology. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Hi, On Wed, Aug 25, 2021 at 3:37 AM Rajendra Nayak <rnayak@codeaurora.org> wrote: > > sc7280 has 8 big.LITTLE CPUs setup with DynamIQ, so all cores are > within the same CPU cluster. Add cpu-map to define the CPU topology. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 36 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) Matches how things look with sc7180 and is correct to the best of my knowledge. I think this is ready to land. Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 53a21d0..05bf748 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -219,6 +219,42 @@ }; }; + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + + core4 { + cpu = <&CPU4>; + }; + + core5 { + cpu = <&CPU5>; + }; + + core6 { + cpu = <&CPU6>; + }; + + core7 { + cpu = <&CPU7>; + }; + }; + }; + idle-states { entry-method = "psci";
sc7280 has 8 big.LITTLE CPUs setup with DynamIQ, so all cores are within the same CPU cluster. Add cpu-map to define the CPU topology. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)