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[4/5] drm/i915/guc: Enable GuC submission by default on DG1

Message ID 20210916162819.27848-5-matthew.brost@intel.com (mailing list archive)
State New, archived
Headers show
Series Enable GuC submission by default on DG1 | expand

Commit Message

Matthew Brost Sept. 16, 2021, 4:28 p.m. UTC 
Enable GuC submission by default on DG1

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

John Harrison Sept. 16, 2021, 5:23 p.m. UTC | #1 
On 9/16/2021 09:28, Matthew Brost wrote:
> Enable GuC submission by default on DG1
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 86c318516e14..2fef3b0bbe95 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -35,7 +35,7 @@ static void uc_expand_default_options(struct intel_uc *uc)
>   	}
>   
>   	/* Intermediate platforms are HuC authentication only */
> -	if (IS_DG1(i915) || IS_ALDERLAKE_S(i915)) {
> +	if (IS_ALDERLAKE_S(i915)) {
>   		i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
>   		return;
>   	}
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 86c318516e14..2fef3b0bbe95 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -35,7 +35,7 @@  static void uc_expand_default_options(struct intel_uc *uc)
 	}
 
 	/* Intermediate platforms are HuC authentication only */
-	if (IS_DG1(i915) || IS_ALDERLAKE_S(i915)) {
+	if (IS_ALDERLAKE_S(i915)) {
 		i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
 		return;
 	}