| Message ID | 1631866380-31017-1-git-send-email-gaosong@loongson.cn (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add LoongArch linux-user emulation support | expand |
On 9/17/21 1:12 AM, Song Gao wrote: > The 'o32' code has been deleted at the latest kernel [1]. This series only support > linux-user emulation. I have now reviewed all but the linux-user/ portion. I see that kernel upstreaming is in progress, https://lore.kernel.org/linux-kernel/20210917035736.3934017-1-chenhuacai@loongson.cn/ so hopefully this will be resolved soon. Have you started working on system mode support for LoongArch, so that one may run that kernel? r~
Hi, Richard. On 09/21/2021 05:17 AM, Richard Henderson wrote: > On 9/17/21 1:12 AM, Song Gao wrote: >> The 'o32' code has been deleted at the latest kernel [1]. This series only support >> linux-user emulation. > > I have now reviewed all but the linux-user/ portion. > Thank you! > I see that kernel upstreaming is in progress, > > https://lore.kernel.org/linux-kernel/20210917035736.3934017-1-chenhuacai@loongson.cn/ > > so hopefully this will be resolved soon. > > Have you started working on system mode support for LoongArch, so that one may run that kernel? > Yes. We already support running the old kernel, but we don't support running the latest kernel yet. Song Gao thanks > > r~
Hi Song, On 9/22/21 14:22, Song Gao wrote: > Hi, Richard. > > On 09/21/2021 05:17 AM, Richard Henderson wrote: >> On 9/17/21 1:12 AM, Song Gao wrote: >>> The 'o32' code has been deleted at the latest kernel [1]. This series only support >>> linux-user emulation. >> I have now reviewed all but the linux-user/ portion. >> > Thank you! >> I see that kernel upstreaming is in progress, >> >> https://lore.kernel.org/linux-kernel/20210917035736.3934017-1-chenhuacai@loongson.cn/ >> >> so hopefully this will be resolved soon. >> >> Have you started working on system mode support for LoongArch, so that one may run that kernel? >> Yes. We already support running the old kernel, but we don't support running the latest kernel yet. (the reply was at the wrong quotation level, never mind though) First of all, thanks for your contribution and continued engagement with the wider development community! That's what it takes to unlock the 3A5000 and future products' so many possibilities. As for the system emulation part, I have some questions though: - How would you provide the necessary firmware bits? Ideally that would be some open-source reference implementation so people would be able to collaborate on that front, and to maybe customize for specialized needs (e.g. ultra-dense cloud use cases like with Firecracker). - How is old/new kernel ABI affecting your system-level emulation compatibility? IIUC the underlying ISA and chip behavior should be the same, only difference would be the firmware-kernel ABI, but again it should be just a matter of substituting the right image. - Would the resulting work support emulating both old-world and new-world systems? AFAIK those commercial distros who're VERY early adopters of LoongArch are given similarly early toolchains/kernels. They belong to the old-world as a result, and are very likely to be stuck on the old-world ABI for whole major versions before migrating, if at all possible. Closed-source/commercial software also risk being available only for the old-world, and it would be extremely important to provide some degree of interoperability so that we don't split the ecosystem. Questions aside, you did a nice work so far; looking forward to your system emulation work!
Hi, Xuerui. > -----Original Messages----- > From: "WANG Xuerui" <i.qemu@xen0n.name> > Sent Time: 2021-09-22 17:49:56 (Wednesday) > To: "Song Gao" <gaosong@loongson.cn>, "Richard Henderson" <richard.henderson@linaro.org>, qemu-devel@nongnu.org > Cc: peter.maydell@linaro.org, thuth@redhat.com, philmd@redhat.com, yangxiaojuan@loongson.cn, laurent@vivier.eu, peterx@redhat.com, f4bug@amsat.org, alistair.francis@wdc.com, maobibo@loongson.cn, pbonzini@redhat.com, bmeng.cn@gmail.com, alex.bennee@linaro.org, chenhuacai@loongson.cn > Subject: Re: [PATCH v6 00/21] Add LoongArch linux-user emulation support > > Hi Song, > > On 9/22/21 14:22, Song Gao wrote: > > Hi, Richard. > > > > On 09/21/2021 05:17 AM, Richard Henderson wrote: > >> On 9/17/21 1:12 AM, Song Gao wrote: > >>> The 'o32' code has been deleted at the latest kernel [1]. This series only support > >>> linux-user emulation. > >> I have now reviewed all but the linux-user/ portion. > >> > > Thank you! > >> I see that kernel upstreaming is in progress, > >> > >> https://lore.kernel.org/linux-kernel/20210917035736.3934017-1-chenhuacai@loongson.cn/ > >> > >> so hopefully this will be resolved soon. > >> > >> Have you started working on system mode support for LoongArch, so that one may run that kernel? > >> Yes. We already support running the old kernel, but we don't support running the latest kernel yet. > > (the reply was at the wrong quotation level, never mind though) > > First of all, thanks for your contribution and continued engagement with > the wider development community! That's what it takes to unlock the > 3A5000 and future products' so many possibilities. > > As for the system emulation part, I have some questions though: > > - How would you provide the necessary firmware bits? Ideally that would > be some open-source reference implementation so people would be able to > collaborate on that front, and to maybe customize for specialized needs > (e.g. ultra-dense cloud use cases like with Firecracker). > On QEMU, we only support 64 bit, So far, we have no plan to support 32 bit. As far as I know, LoongArch BIOS is planning to open source. > - How is old/new kernel ABI affecting your system-level emulation > compatibility? IIUC the underlying ISA and chip behavior should be the > same, only difference would be the firmware-kernel ABI, but again it > should be just a matter of substituting the right image. > We only supoort the lastet kernel [1]. [1] https://github.com/loongson/linux/tree/loongarch-next > - Would the resulting work support emulating both old-world and > new-world systems? AFAIK those commercial distros who're VERY early > adopters of LoongArch are given similarly early toolchains/kernels. They > belong to the old-world as a result, and are very likely to be stuck on > the old-world ABI for whole major versions before migrating, if at all > possible. Closed-source/commercial software also risk being available > only for the old-world, and it would be extremely important to provide > some degree of interoperability so that we don't split the ecosystem. On the basis of supporting the latest kernel, we will try to be compatible with the old version of LoongArch. But the result may be incompatible。 Song Gao thanks. > Questions aside, you did a nice work so far; looking forward to your > system emulation work! </richard.henderson@linaro.org></gaosong@loongson.cn></i.qemu@xen0n.name> 本邮件及其附件含有龙芯中科的商业秘密信息，仅限于发送给上面地址中列出的个人或群组。禁止任何其他人以任何形式使用（包括但不限于全部或部分地泄露、复制或散发）本邮件及其附件中的信息。如果您错收本邮件，请您立即电话或邮件通知发件人并删除本邮件。 This email and its attachments contain confidential information from Loongson Technology , which is intended only for the person or entity whose address is listed above. Any use of the information contained herein in any way (including, but not limited to, total or partial disclosure, reproduction or dissemination) by persons other than the intended recipient(s) is prohibited. If you receive this email in error, please notify the sender by phone or email immediately and delete it.
Hi Song, On 9/23/21 11:09, gaosong wrote: > > > > - How would you provide the necessary firmware bits? Ideally that would > > be some open-source reference implementation so people would be able to > > collaborate on that front, and to maybe customize for specialized needs > > (e.g. ultra-dense cloud use cases like with Firecracker). > > > > On QEMU, we only support 64 bit, So far, we have no plan to support 32 bit. IMO it's fine to not support 32-bit for now. > As far as I know, LoongArch BIOS is planning to open source. And that's exciting to hear! Really looking forward to that. > > - How is old/new kernel ABI affecting your system-level emulation > > compatibility? IIUC the underlying ISA and chip behavior should be the > > same, only difference would be the firmware-kernel ABI, but again it > > should be just a matter of substituting the right image. > > > > We only supoort the lastet kernel [1]. > > [1] https://github.com/loongson/linux/tree/loongarch-next I may formed the question ambiguously; I'm actually interested in what kernel flavor qemu will support emulating, not what qemu runs on. IIUC qemu will compile and run fine on both old-world and new-world systems. But anyway, we'll find out when your code is out for review. > > - Would the resulting work support emulating both old-world and > > new-world systems? AFAIK those commercial distros who're VERY early > > adopters of LoongArch are given similarly early toolchains/kernels. They > > belong to the old-world as a result, and are very likely to be stuck on > > the old-world ABI for whole major versions before migrating, if at all > > possible. Closed-source/commercial software also risk being available > > only for the old-world, and it would be extremely important to provide > > some degree of interoperability so that we don't split the ecosystem. > > On the basis of supporting the latest kernel, we will try to be compatible with the old version of LoongArch. > But the result may be incompatible。 Thanks for the clarification. Indeed focusing on new-world should be the right way to go, adding old-world compatibility later if possible. I fear adding compatibility too early would result in a franken-port not serving either world well nor maintainable.
Hi, Richard.
On 09/17/2021 04:12 PM, Song Gao wrote:
> Based-on: <20210822035537.283193-6-richard.henderson@linaro.org>
This patch failed in applying to current master. I am not sure how to use it ...
Thanks.
Song Gao
Based-on: <20210822035537.283193-6-richard.henderson@linaro.org> Based-on: <20210618192951.125651-2-richard.henderson@linaro.org> Hi, The 'o32' code has been deleted at the latest kernel [1]. This series only support linux-user emulation. More about LoongArch at: https://github.com/loongson/ [1] https://github.com/loongson/linux/tree/loongarch-next Missing review: * 0001-target-loongarch-Add-README.patch * 0002-target-loongarch-Add-core-definition.patch * 0017-LoongArch-Linux-User-Emulation.patch Changes for v6: * Resolve patch10 and patch6 code issues. Changes for v5: * Follow Richard's code review comments [1]. * Use force_sig_fault(). * Implement setup_sigtramp. [1]: https://patchew.org/QEMU/1630586467-22463-1-git-send-email-gaosong@loongson.cn/ Changes for v4: * Update README，add LoongArch linux-user emulation Introduction. * Add 'make check-tcg' support(patch 20). * Add binfmt config(patch 21). * Fix bugs when running loongarch basic commands. Changes for v3: * Split trans.inc.c. * Remove csr registers. * Delete patchs 2, 4, 5. * Follow Richard's code review comments [1]. * Follow Richard's riscv patches [2]. [1]: https://patchew.org/QEMU/1626861198-6133-1-git-send-email-gaosong@loongson.cn/ [2]: https://patchew.org/QEMU/20210823195529.560295-1-richard.henderson@linaro.org/ Changes for v2: * Patch 1, remove unnecessary introduction; * Patch 3, follow the ARM/AVR pattern to add new CPU features; * Patch 6, remove decode_lsx(); * Patches 7-18, delete opcode definition, modify translation function; * Patches 20-22, split V1 patch20 to V2 patch20-22. V5: https://patchew.org/QEMU/1631624431-30658-1-git-send-email-gaosong@loongson.cn/ V4: https://patchew.org/QEMU/1630586467-22463-1-git-send-email-gaosong@loongson.cn/ V3: https://patchew.org/QEMU/1630048494-2143-1-git-send-email-gaosong@loongson.cn/ V2: https://patchew.org/QEMU/1626861198-6133-1-git-send-email-gaosong@loongson.cn/ V1: https://patchew.org/QEMU/1624881885-31692-1-git-send-email-gaosong@loongson.cn/ Please review! Thanks. Song Gao (21): target/loongarch: Add README target/loongarch: Add core definition target/loongarch: Add main translation routines target/loongarch: Add fixed point arithmetic instruction translation target/loongarch: Add fixed point shift instruction translation target/loongarch: Add fixed point bit instruction translation target/loongarch: Add fixed point load/store instruction translation target/loongarch: Add fixed point atomic instruction translation target/loongarch: Add fixed point extra instruction translation target/loongarch: Add floating point arithmetic instruction translation target/loongarch: Add floating point comparison instruction translation target/loongarch: Add floating point conversion instruction translation target/loongarch: Add floating point move instruction translation target/loongarch: Add floating point load/store instruction translation target/loongarch: Add branch instruction translation target/loongarch: Add disassembler LoongArch Linux User Emulation default-configs: Add loongarch linux-user support target/loongarch: Add target build suport target/loongarch: 'make check-tcg' support scripts: add loongarch64 binfmt config MAINTAINERS | 6 + accel/tcg/user-exec.c | 15 + configs/targets/loongarch64-linux-user.mak | 3 + configure | 5 + disas/loongarch.c | 2511 +++++++++++++++++++++++++++ disas/meson.build | 1 + include/disas/dis-asm.h | 2 + include/elf.h | 2 + linux-user/elfload.c | 58 + linux-user/host/loongarch/hostdep.h | 11 + linux-user/loongarch64/cpu_loop.c | 97 ++ linux-user/loongarch64/signal.c | 162 ++ linux-user/loongarch64/sockbits.h | 1 + linux-user/loongarch64/syscall_nr.h | 312 ++++ linux-user/loongarch64/target_cpu.h | 35 + linux-user/loongarch64/target_elf.h | 14 + linux-user/loongarch64/target_errno_defs.h | 7 + linux-user/loongarch64/target_fcntl.h | 12 + linux-user/loongarch64/target_signal.h | 30 + linux-user/loongarch64/target_structs.h | 49 + linux-user/loongarch64/target_syscall.h | 46 + linux-user/loongarch64/termbits.h | 1 + linux-user/syscall_defs.h | 10 +- meson.build | 3 +- scripts/qemu-binfmt-conf.sh | 6 +- target/loongarch/README | 76 + target/loongarch/cpu-param.h | 19 + target/loongarch/cpu.c | 286 +++ target/loongarch/cpu.h | 151 ++ target/loongarch/fpu_helper.c | 865 +++++++++ target/loongarch/helper.h | 97 ++ target/loongarch/insn_trans/trans_arith.c | 322 ++++ target/loongarch/insn_trans/trans_atomic.c | 133 ++ target/loongarch/insn_trans/trans_bit.c | 255 +++ target/loongarch/insn_trans/trans_branch.c | 85 + target/loongarch/insn_trans/trans_extra.c | 87 + target/loongarch/insn_trans/trans_farith.c | 108 ++ target/loongarch/insn_trans/trans_fcmp.c | 59 + target/loongarch/insn_trans/trans_fcnv.c | 36 + target/loongarch/insn_trans/trans_fmemory.c | 187 ++ target/loongarch/insn_trans/trans_fmov.c | 153 ++ target/loongarch/insn_trans/trans_memory.c | 235 +++ target/loongarch/insn_trans/trans_shift.c | 131 ++ target/loongarch/insns.decode | 480 +++++ target/loongarch/internals.h | 29 + target/loongarch/meson.build | 18 + target/loongarch/op_helper.c | 85 + target/loongarch/translate.c | 288 +++ target/loongarch/translate.h | 46 + target/meson.build | 1 + tests/tcg/configure.sh | 1 + 51 files changed, 7626 insertions(+), 6 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak create mode 100644 disas/loongarch.c create mode 100644 linux-user/host/loongarch/hostdep.h create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 target/loongarch/README create mode 100644 target/loongarch/cpu-param.h create mode 100644 target/loongarch/cpu.c create mode 100644 target/loongarch/cpu.h create mode 100644 target/loongarch/fpu_helper.c create mode 100644 target/loongarch/helper.h create mode 100644 target/loongarch/insn_trans/trans_arith.c create mode 100644 target/loongarch/insn_trans/trans_atomic.c create mode 100644 target/loongarch/insn_trans/trans_bit.c create mode 100644 target/loongarch/insn_trans/trans_branch.c create mode 100644 target/loongarch/insn_trans/trans_extra.c create mode 100644 target/loongarch/insn_trans/trans_farith.c create mode 100644 target/loongarch/insn_trans/trans_fcmp.c create mode 100644 target/loongarch/insn_trans/trans_fcnv.c create mode 100644 target/loongarch/insn_trans/trans_fmemory.c create mode 100644 target/loongarch/insn_trans/trans_fmov.c create mode 100644 target/loongarch/insn_trans/trans_memory.c create mode 100644 target/loongarch/insn_trans/trans_shift.c create mode 100644 target/loongarch/insns.decode create mode 100644 target/loongarch/internals.h create mode 100644 target/loongarch/meson.build create mode 100644 target/loongarch/op_helper.c create mode 100644 target/loongarch/translate.c create mode 100644 target/loongarch/translate.h