diff mbox series

[PATCHv2,5/5] irqchip/GICv3: make reschedule-ipi light weight

Message ID 20210924132837.45994-6-kernelfans@gmail.com (mailing list archive)
State New, archived
Headers show
Series arm64/irqentry: remove duplicate housekeeping of | expand

Commit Message

Pingfan Liu Sept. 24, 2021, 1:28 p.m. UTC
To achieve the light weight as
DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) on x86, it had
better treat irqnr differently at the frontend. And let IPI_RESCHEDULE
call __irq_enter_raw() instead of irq_enter_rcu().

Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Joey Gouly <joey.gouly@arm.com>
Cc: Sami Tolvanen <samitolvanen@google.com>
Cc: Julien Thierry <julien.thierry@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yuichi Ito <ito-yuichi@fujitsu.com>
Cc: linux-kernel@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
---
 drivers/irqchip/irq-gic-v3.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

Marc Zyngier Sept. 29, 2021, 7:24 a.m. UTC | #1
On Fri, 24 Sep 2021 14:28:37 +0100,
Pingfan Liu <kernelfans@gmail.com> wrote:
> 
> To achieve the light weight as
> DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) on x86, it had
> better treat irqnr differently at the frontend. And let IPI_RESCHEDULE
> call __irq_enter_raw() instead of irq_enter_rcu().
> 
> Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Joey Gouly <joey.gouly@arm.com>
> Cc: Sami Tolvanen <samitolvanen@google.com>
> Cc: Julien Thierry <julien.thierry@arm.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Yuichi Ito <ito-yuichi@fujitsu.com>
> Cc: linux-kernel@vger.kernel.org
> To: linux-arm-kernel@lists.infradead.org
> ---
>  drivers/irqchip/irq-gic-v3.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index 906538fa8771..593d4539a209 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -709,6 +709,9 @@ static void gic_handle_nmi(struct pt_regs *regs)
>  		gic_deactivate_unhandled(irqnr);
>  }
>  
> +/* RESCHEDULE IPI hwirq nr is 0, and the only raw one */
> +static unsigned long raw_interrupt_mask = 1;

I'm afraid you have the wrong end of the stick. This isn't a GIC
property. This is an architecture decision, and only the architecture
can expose what they want.

	M.
Pingfan Liu Sept. 29, 2021, 8:32 a.m. UTC | #2
On Wed, Sep 29, 2021 at 08:24:34AM +0100, Marc Zyngier wrote:
> On Fri, 24 Sep 2021 14:28:37 +0100,
> Pingfan Liu <kernelfans@gmail.com> wrote:
> > 
> > To achieve the light weight as
> > DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) on x86, it had
> > better treat irqnr differently at the frontend. And let IPI_RESCHEDULE
> > call __irq_enter_raw() instead of irq_enter_rcu().
> > 
> > Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Marc Zyngier <maz@kernel.org>
> > Cc: Joey Gouly <joey.gouly@arm.com>
> > Cc: Sami Tolvanen <samitolvanen@google.com>
> > Cc: Julien Thierry <julien.thierry@arm.com>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Yuichi Ito <ito-yuichi@fujitsu.com>
> > Cc: linux-kernel@vger.kernel.org
> > To: linux-arm-kernel@lists.infradead.org
> > ---
> >  drivers/irqchip/irq-gic-v3.c | 15 +++++++++++++--
> >  1 file changed, 13 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> > index 906538fa8771..593d4539a209 100644
> > --- a/drivers/irqchip/irq-gic-v3.c
> > +++ b/drivers/irqchip/irq-gic-v3.c
> > @@ -709,6 +709,9 @@ static void gic_handle_nmi(struct pt_regs *regs)
> >  		gic_deactivate_unhandled(irqnr);
> >  }
> >  
> > +/* RESCHEDULE IPI hwirq nr is 0, and the only raw one */
> > +static unsigned long raw_interrupt_mask = 1;
> 
> I'm afraid you have the wrong end of the stick. This isn't a GIC
> property. This is an architecture decision, and only the architecture
> can expose what they want.
> 
Could it done be export an interface int (*get_irq_nr)(pte_regs) to
do_interrupt_handler()? So it can be seen as an architecture
decision.


Thanks,

	Pingfan
> 
> -- 
> Without deviation from the norm, progress is not possible.
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff mbox series

Patch

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 906538fa8771..593d4539a209 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -709,6 +709,9 @@  static void gic_handle_nmi(struct pt_regs *regs)
 		gic_deactivate_unhandled(irqnr);
 }
 
+/* RESCHEDULE IPI hwirq nr is 0, and the only raw one */
+static unsigned long raw_interrupt_mask = 1;
+
 static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
 {
 	u32 irqnr;
@@ -729,12 +732,20 @@  static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs
 	else
 		isb();
 
-	irq_enter_rcu();
+	if (raw_interrupt_mask & 1 << irqnr)
+		__irq_enter_raw();
+	else
+		irq_enter_rcu();
+
 	if (handle_domain_irq(gic_data.domain, irqnr, regs)) {
 		WARN_ONCE(true, "Unexpected interrupt received!\n");
 		gic_deactivate_unhandled(irqnr);
 	}
-	irq_exit_rcu();
+
+	if (raw_interrupt_mask & 1 << irqnr)
+		__irq_exit_raw();
+	else
+		irq_exit_rcu();
 }
 
 static u32 gic_get_pribits(void)