| Message ID | 20210930131850.21202-2-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mailbox: cmdq: add instruction time-out interrupt support | expand |
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年9月30日 週四 下午9:18寫道： > > add time-out cycle setting to make sure time-out interrupt irq > will happened when instruction time-out for wait and poll > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c > index 64175a893312..197b03222f94 100644 > --- a/drivers/mailbox/mtk-cmdq-mailbox.c > +++ b/drivers/mailbox/mtk-cmdq-mailbox.c > @@ -36,6 +36,7 @@ > #define CMDQ_THR_END_ADDR 0x24 > #define CMDQ_THR_WAIT_TOKEN 0x30 > #define CMDQ_THR_PRIORITY 0x40 > +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES 0x50 > > #define GCE_GCTL_VALUE 0x48 > > @@ -54,6 +55,15 @@ > #define CMDQ_JUMP_BY_OFFSET 0x10000000 > #define CMDQ_JUMP_BY_PA 0x10000001 > > +/* > + * instruction time-out > + * cycles to issue instruction time-out interrupt for wait and poll instructions > + * GCE axi_clock 156MHz > + * 1 cycle = 6.41ns > + * instruction time out 2^22*2*6.41ns = 53ms For different clients, the timeout value would be different, and each client could use timer to detect timeout, so it's not necessary to enable timeout in cmdq driver. Regards, Chun-Kuang. > + */ > +#define CMDQ_INSTN_TIMEOUT_CYCLES 22 > + > struct cmdq_thread { > struct mbox_chan *chan; > void __iomem *base; > @@ -376,6 +386,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) > writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa, > thread->base + CMDQ_THR_END_ADDR); > > + writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES); > writel(thread->priority, thread->base + CMDQ_THR_PRIORITY); > writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE); > writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK); > -- > 2.25.1 >
On Tue, 2021-10-05 at 07:41 +0800, Chun-Kuang Hu wrote: > Hi, Yongqiang: > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年9月30日 週四 下午9:18寫道： > > > > add time-out cycle setting to make sure time-out interrupt irq > > will happened when instruction time-out for wait and poll > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > --- > > drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c > > b/drivers/mailbox/mtk-cmdq-mailbox.c > > index 64175a893312..197b03222f94 100644 > > --- a/drivers/mailbox/mtk-cmdq-mailbox.c > > +++ b/drivers/mailbox/mtk-cmdq-mailbox.c > > @@ -36,6 +36,7 @@ > > #define CMDQ_THR_END_ADDR 0x24 > > #define CMDQ_THR_WAIT_TOKEN 0x30 > > #define CMDQ_THR_PRIORITY 0x40 > > +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES 0x50 > > > > #define GCE_GCTL_VALUE 0x48 > > > > @@ -54,6 +55,15 @@ > > #define CMDQ_JUMP_BY_OFFSET 0x10000000 > > #define CMDQ_JUMP_BY_PA 0x10000001 > > > > +/* > > + * instruction time-out > > + * cycles to issue instruction time-out interrupt for wait and > > poll instructions > > + * GCE axi_clock 156MHz > > + * 1 cycle = 6.41ns > > + * instruction time out 2^22*2*6.41ns = 53ms > > For different clients, the timeout value would be different, and each > client could use timer to detect timeout, so it's not necessary to > enable timeout in cmdq driver. > > Regards, > Chun-Kuang. if we do not set cmdq hardware timeout, this condition will never happen cmdq_thread_irq_handler if (irq_flag & CMDQ_THR_IRQ_ERROR) err = true; and no error callback else if (err) { cmdq_task_exec_done(task, -ENOEXEC); cmdq_task_handle_error(curr_task); kfree(task); } the client will never received the error callback, cmdq hardware will poll the event for ever and no report timeout > > > + */ > > +#define CMDQ_INSTN_TIMEOUT_CYCLES 22 > > + > > struct cmdq_thread { > > struct mbox_chan *chan; > > void __iomem *base; > > @@ -376,6 +386,7 @@ static int cmdq_mbox_send_data(struct mbox_chan > > *chan, void *data) > > writel((task->pa_base + pkt->cmd_buf_size) >> cmdq- > > >shift_pa, > > thread->base + CMDQ_THR_END_ADDR); > > > > + writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + > > CMDQ_THR_INSTN_TIMEOUT_CYCLES); > > writel(thread->priority, thread->base + > > CMDQ_THR_PRIORITY); > > writel(CMDQ_THR_IRQ_EN, thread->base + > > CMDQ_THR_IRQ_ENABLE); > > writel(CMDQ_THR_ENABLED, thread->base + > > CMDQ_THR_ENABLE_TASK); > > -- > > 2.25.1 > >
On Fri, 2021-10-08 at 22:55 +0800, Chun-Kuang Hu wrote: > Hi, Yongqiang: > > yongqiang.niu <yongqiang.niu@mediatek.com> 於 2021年10月8日 週五 上午9:49寫道： > > > > On Tue, 2021-10-05 at 07:41 +0800, Chun-Kuang Hu wrote: > > > Hi, Yongqiang: > > > > > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年9月30日 週四 > > > 下午9:18寫道： > > > > > > > > add time-out cycle setting to make sure time-out interrupt irq > > > > will happened when instruction time-out for wait and poll > > > > > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > > > --- > > > > drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++ > > > > 1 file changed, 11 insertions(+) > > > > > > > > diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c > > > > b/drivers/mailbox/mtk-cmdq-mailbox.c > > > > index 64175a893312..197b03222f94 100644 > > > > --- a/drivers/mailbox/mtk-cmdq-mailbox.c > > > > +++ b/drivers/mailbox/mtk-cmdq-mailbox.c > > > > @@ -36,6 +36,7 @@ > > > > #define CMDQ_THR_END_ADDR 0x24 > > > > #define CMDQ_THR_WAIT_TOKEN 0x30 > > > > #define CMDQ_THR_PRIORITY 0x40 > > > > +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES 0x50 > > > > > > > > #define GCE_GCTL_VALUE 0x48 > > > > > > > > @@ -54,6 +55,15 @@ > > > > #define CMDQ_JUMP_BY_OFFSET 0x10000000 > > > > #define CMDQ_JUMP_BY_PA 0x10000001 > > > > > > > > +/* > > > > + * instruction time-out > > > > + * cycles to issue instruction time-out interrupt for wait and > > > > poll instructions > > > > + * GCE axi_clock 156MHz > > > > + * 1 cycle = 6.41ns > > > > + * instruction time out 2^22*2*6.41ns = 53ms > > > > > > For different clients, the timeout value would be different, and > > > each > > > client could use timer to detect timeout, so it's not necessary > > > to > > > enable timeout in cmdq driver. > > > > > > Regards, > > > Chun-Kuang. > > > > if we do not set cmdq hardware timeout, this condition will never > > happen > > cmdq_thread_irq_handler > > if (irq_flag & CMDQ_THR_IRQ_ERROR) > > err = true; > > > > and no error callback > > else if (err) { > > cmdq_task_exec_done(task, -ENOEXEC); > > cmdq_task_handle_error(curr_task); > > kfree(task); > > } > > the client will never received the error callback, cmdq hardware > > will > > poll the event for ever and no report timeout > > I think there are two way to implement the timeout mechanism. The > first way is to use the GCE hardware to detect timeout. The second > way > is that client driver use timer to detect timeout, when it's timeout, > use mbox_flush() to clean up the packets in mtk cmdq driver, and > remove the error handle in irq handler. > If you think the first way is better, I think you should pass the > timeout value from client driver to cmdq driver because each client > driver has different timeout value. And the GCE clock may be > different > in each SoC, so use clk_get_rate() to get the clock frequency for > different SoC. > > Regards, > Chun-Kuang. this patch only used for mdp instruction error and and trigger hw timeout flow, it is for debug, i will abandon this patch and will not send upstream anymore. > > > > > > > > + */ > > > > +#define CMDQ_INSTN_TIMEOUT_CYCLES 22 > > > > + > > > > struct cmdq_thread { > > > > struct mbox_chan *chan; > > > > void __iomem *base; > > > > @@ -376,6 +386,7 @@ static int cmdq_mbox_send_data(struct > > > > mbox_chan > > > > *chan, void *data) > > > > writel((task->pa_base + pkt->cmd_buf_size) >> > > > > cmdq- > > > > > shift_pa, > > > > > > > > thread->base + CMDQ_THR_END_ADDR); > > > > > > > > + writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base > > > > + > > > > CMDQ_THR_INSTN_TIMEOUT_CYCLES); > > > > writel(thread->priority, thread->base + > > > > CMDQ_THR_PRIORITY); > > > > writel(CMDQ_THR_IRQ_EN, thread->base + > > > > CMDQ_THR_IRQ_ENABLE); > > > > writel(CMDQ_THR_ENABLED, thread->base + > > > > CMDQ_THR_ENABLE_TASK); > > > > -- > > > > 2.25.1 > > > >
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index 64175a893312..197b03222f94 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -36,6 +36,7 @@ #define CMDQ_THR_END_ADDR 0x24 #define CMDQ_THR_WAIT_TOKEN 0x30 #define CMDQ_THR_PRIORITY 0x40 +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES 0x50 #define GCE_GCTL_VALUE 0x48 @@ -54,6 +55,15 @@ #define CMDQ_JUMP_BY_OFFSET 0x10000000 #define CMDQ_JUMP_BY_PA 0x10000001 +/* + * instruction time-out + * cycles to issue instruction time-out interrupt for wait and poll instructions + * GCE axi_clock 156MHz + * 1 cycle = 6.41ns + * instruction time out 2^22*2*6.41ns = 53ms + */ +#define CMDQ_INSTN_TIMEOUT_CYCLES 22 + struct cmdq_thread { struct mbox_chan *chan; void __iomem *base; @@ -376,6 +386,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa, thread->base + CMDQ_THR_END_ADDR); + writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES); writel(thread->priority, thread->base + CMDQ_THR_PRIORITY); writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE); writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
add time-out cycle setting to make sure time-out interrupt irq will happened when instruction time-out for wait and poll Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> --- drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++ 1 file changed, 11 insertions(+)