| Message ID | 1633687054-18865-2-git-send-email-wanpengli@tencent.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] KVM: emulate: #GP when emulating rdpmc if CR0.PE is 1 | expand |
cc Andi, On 8/10/2021 5:57 pm, Wanpeng Li wrote: > From: Wanpeng Li <wanpengli@tencent.com> > > SDM section 18.2.3 mentioned that: > > "IA32_PERF_GLOBAL_OVF_CTL MSR allows software to clear overflow indicator(s) of > any general-purpose or fixed-function counters via a single WRMSR." > > It is R/W mentioned by SDM, we read this msr on bare-metal during perf testing, > the value is always 0 for CLX/SKX boxes on hands. Let's fill get_msr > MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0 as hardware behavior. > > Signed-off-by: Wanpeng Li <wanpengli@tencent.com> > --- > Btw, xen also fills get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL 0. > > arch/x86/kvm/vmx/pmu_intel.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c > index 10cc4f65c4ef..47260a8563f9 100644 > --- a/arch/x86/kvm/vmx/pmu_intel.c > +++ b/arch/x86/kvm/vmx/pmu_intel.c > @@ -365,7 +365,7 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > msr_info->data = pmu->global_ctrl; > return 0; > case MSR_CORE_PERF_GLOBAL_OVF_CTRL: > - msr_info->data = pmu->global_ovf_ctrl; > + msr_info->data = 0; Tested-by: Like Xu <likexu@tencent.com> Further, better to drop 'u64 global_ovf_ctrl' directly. > return 0; > default: > if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) || >
On Fri, 8 Oct 2021 at 19:02, Like Xu <like.xu.linux@gmail.com> wrote: > > cc Andi, > > On 8/10/2021 5:57 pm, Wanpeng Li wrote: > > From: Wanpeng Li <wanpengli@tencent.com> > > > > SDM section 18.2.3 mentioned that: > > > > "IA32_PERF_GLOBAL_OVF_CTL MSR allows software to clear overflow indicator(s) of > > any general-purpose or fixed-function counters via a single WRMSR." > > > > It is R/W mentioned by SDM, we read this msr on bare-metal during perf testing, > > the value is always 0 for CLX/SKX boxes on hands. Let's fill get_msr > > MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0 as hardware behavior. > > > > Signed-off-by: Wanpeng Li <wanpengli@tencent.com> > > --- > > Btw, xen also fills get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL 0. > > > > arch/x86/kvm/vmx/pmu_intel.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c > > index 10cc4f65c4ef..47260a8563f9 100644 > > --- a/arch/x86/kvm/vmx/pmu_intel.c > > +++ b/arch/x86/kvm/vmx/pmu_intel.c > > @@ -365,7 +365,7 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > > msr_info->data = pmu->global_ctrl; > > return 0; > > case MSR_CORE_PERF_GLOBAL_OVF_CTRL: > > - msr_info->data = pmu->global_ovf_ctrl; > > + msr_info->data = 0; > > Tested-by: Like Xu <likexu@tencent.com> Thanks. > Further, better to drop 'u64 global_ovf_ctrl' directly. Good suggestion. :) Wanpeng
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 10cc4f65c4ef..47260a8563f9 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -365,7 +365,7 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) msr_info->data = pmu->global_ctrl; return 0; case MSR_CORE_PERF_GLOBAL_OVF_CTRL: - msr_info->data = pmu->global_ovf_ctrl; + msr_info->data = 0; return 0; default: if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||