| Message ID | 20210625013341.231442-1-Smita.KoralahalliChannabasappa@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] x86/mce: Define function to extract ErrorAddr from MCA_ADDR | expand |
On Thu, Jun 24, 2021 at 08:33:40PM -0500, Smita Koralahalli wrote: > Move MCA_ADDR[ErrorAddr] extraction into a separate helper function. This > will be further refactored in the next patch. > > Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> > --- Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> Thanks, Yazen
Hi all, Do you have any other comments which I need to address on these set of patches? On 6/24/21 8:33 PM, Smita Koralahalli wrote: > Move MCA_ADDR[ErrorAddr] extraction into a separate helper function. This > will be further refactored in the next patch. > > Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> > --- > v2: > - No change. > --- > arch/x86/include/asm/mce.h | 2 ++ > arch/x86/kernel/cpu/mce/amd.c | 14 +++++++++----- > arch/x86/kernel/cpu/mce/core.c | 7 ++----- > 3 files changed, 13 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h > index 0607ec4f5091..0a1c7224a582 100644 > --- a/arch/x86/include/asm/mce.h > +++ b/arch/x86/include/asm/mce.h > @@ -357,6 +357,7 @@ extern int mce_threshold_remove_device(unsigned int cpu); > > void mce_amd_feature_init(struct cpuinfo_x86 *c); > int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr); > +void smca_extract_err_addr(struct mce *m); > > #else > > @@ -366,6 +367,7 @@ static inline bool amd_mce_is_memory_error(struct mce *m) { return false; }; > static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { } > static inline int > umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { return -EINVAL; }; > +static inline void smca_extract_err_addr(struct mce *m) { } > #endif > > static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); } > diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c > index 08831acc1d03..f71435e53cdb 100644 > --- a/arch/x86/kernel/cpu/mce/amd.c > +++ b/arch/x86/kernel/cpu/mce/amd.c > @@ -899,6 +899,13 @@ bool amd_mce_is_memory_error(struct mce *m) > return m->bank == 4 && xec == 0x8; > } > > +void smca_extract_err_addr(struct mce *m) > +{ > + u8 lsb = (m->addr >> 56) & 0x3f; > + > + m->addr &= GENMASK_ULL(55, lsb); > +} > + > static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) > { > struct mce m; > @@ -917,11 +924,8 @@ static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) > * Extract [55:<lsb>] where lsb is the least significant > * *valid* bit of the address bits. > */ > - if (mce_flags.smca) { > - u8 lsb = (m.addr >> 56) & 0x3f; > - > - m.addr &= GENMASK_ULL(55, lsb); > - } > + if (mce_flags.smca) > + smca_extract_err_addr(&m); > } > > if (mce_flags.smca) { > diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c > index bf7fe87a7e88..2c09c1eec50a 100644 > --- a/arch/x86/kernel/cpu/mce/core.c > +++ b/arch/x86/kernel/cpu/mce/core.c > @@ -703,11 +703,8 @@ static void mce_read_aux(struct mce *m, int i) > * Extract [55:<lsb>] where lsb is the least significant > * *valid* bit of the address bits. > */ > - if (mce_flags.smca) { > - u8 lsb = (m->addr >> 56) & 0x3f; > - > - m->addr &= GENMASK_ULL(55, lsb); > - } > + if (mce_flags.smca) > + smca_extract_err_addr(m); > } > > if (mce_flags.smca) {
On Mon, Sep 13, 2021 at 02:19:33PM -0500, Smita Koralahalli Channabasappa wrote: > Hi all, > > Do you have any other comments which I need to address on these set of patches? You probably should rediff them against latest tip/master and send a new version. Thx.
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 0607ec4f5091..0a1c7224a582 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -357,6 +357,7 @@ extern int mce_threshold_remove_device(unsigned int cpu); void mce_amd_feature_init(struct cpuinfo_x86 *c); int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr); +void smca_extract_err_addr(struct mce *m); #else @@ -366,6 +367,7 @@ static inline bool amd_mce_is_memory_error(struct mce *m) { return false; }; static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { } static inline int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { return -EINVAL; }; +static inline void smca_extract_err_addr(struct mce *m) { } #endif static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); } diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index 08831acc1d03..f71435e53cdb 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -899,6 +899,13 @@ bool amd_mce_is_memory_error(struct mce *m) return m->bank == 4 && xec == 0x8; } +void smca_extract_err_addr(struct mce *m) +{ + u8 lsb = (m->addr >> 56) & 0x3f; + + m->addr &= GENMASK_ULL(55, lsb); +} + static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) { struct mce m; @@ -917,11 +924,8 @@ static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) * Extract [55:<lsb>] where lsb is the least significant * *valid* bit of the address bits. */ - if (mce_flags.smca) { - u8 lsb = (m.addr >> 56) & 0x3f; - - m.addr &= GENMASK_ULL(55, lsb); - } + if (mce_flags.smca) + smca_extract_err_addr(&m); } if (mce_flags.smca) { diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index bf7fe87a7e88..2c09c1eec50a 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -703,11 +703,8 @@ static void mce_read_aux(struct mce *m, int i) * Extract [55:<lsb>] where lsb is the least significant * *valid* bit of the address bits. */ - if (mce_flags.smca) { - u8 lsb = (m->addr >> 56) & 0x3f; - - m->addr &= GENMASK_ULL(55, lsb); - } + if (mce_flags.smca) + smca_extract_err_addr(m); } if (mce_flags.smca) {
Move MCA_ADDR[ErrorAddr] extraction into a separate helper function. This will be further refactored in the next patch. Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> --- v2: - No change. --- arch/x86/include/asm/mce.h | 2 ++ arch/x86/kernel/cpu/mce/amd.c | 14 +++++++++----- arch/x86/kernel/cpu/mce/core.c | 7 ++----- 3 files changed, 13 insertions(+), 10 deletions(-)