Message ID | 20211014185400.10451-3-nchatrad@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v4,1/4] x86/amd_nb: Add support for northbridges on Aldebaran | expand |
On Fri, Oct 15, 2021 at 12:23:58AM +0530, Naveen Krishna Chatradhi wrote: > On SMCA banks of the GPU nodes, the node id information is > available in register MCA_IPID[47:44](InstanceIdHi). > > Convert the hardware node ID to a value used by Linux > where GPU nodes are sequencially after the CPU nodes. > > Co-developed-by: Muralidhara M K <muralimk@amd.com> > Signed-off-by: Muralidhara M K <muralimk@amd.com> > Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com> > Link: https://lkml.kernel.org/r/20210823185437.94417-3-nchatrad@amd.com > --- > Changes since v3: > 1. Use APIs from amd_nb to identify the gpu_node_start_id and cpu_node_count. > Which is required to map the hardware node id to node id enumerated by Linux. > > Changes since v2: > 1. Modified subject and commit message > 2. Added Reviewed by Yazen Ghannam > > Changes since v1: > 1. Modified the commit message > 2. rearranged the conditions before calling decode_dram_ecc() > > drivers/edac/mce_amd.c | 24 ++++++++++++++++++++++-- > 1 file changed, 22 insertions(+), 2 deletions(-) > > diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c > index 67dbf4c31271..af6caa76adc7 100644 > --- a/drivers/edac/mce_amd.c > +++ b/drivers/edac/mce_amd.c > @@ -2,6 +2,7 @@ > #include <linux/module.h> > #include <linux/slab.h> > > +#include <asm/amd_nb.h> > #include <asm/cpu.h> > > #include "mce_amd.h" > @@ -1072,8 +1073,27 @@ static void decode_smca_error(struct mce *m) > if (xec < smca_mce_descs[bank_type].num_descs) > pr_cont(", %s.\n", smca_mce_descs[bank_type].descs[xec]); > > - if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc) > - decode_dram_ecc(topology_die_id(m->extcpu), m); > + if (xec == 0 && decode_dram_ecc) { > + int node_id = 0; > + > + if (bank_type == SMCA_UMC) { > + node_id = topology_die_id(m->extcpu); > + } else if (bank_type == SMCA_UMC_V2) { > + /* > + * SMCA_UMC_V2 exists on GPU nodes, extract the node id > + * from register MCA_IPID[47:44](InstanceIdHi). > + * The InstanceIdHi field represents the instance ID of the GPU. > + * Which needs to be mapped to a value used by Linux, > + * where GPU nodes are simply numerically after the CPU nodes. > + */ > + node_id = ((m->ipid >> 44) & 0xF) - > + amd_gpu_node_start_id() + amd_cpu_node_count(); > + } else { > + return; > + } > + > + decode_dram_ecc(node_id, m); > + } > } > > static inline void amd_decode_err_code(u16 ec) > -- This looks good to me. Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> Thanks, Yazen
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 67dbf4c31271..af6caa76adc7 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -2,6 +2,7 @@ #include <linux/module.h> #include <linux/slab.h> +#include <asm/amd_nb.h> #include <asm/cpu.h> #include "mce_amd.h" @@ -1072,8 +1073,27 @@ static void decode_smca_error(struct mce *m) if (xec < smca_mce_descs[bank_type].num_descs) pr_cont(", %s.\n", smca_mce_descs[bank_type].descs[xec]); - if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc) - decode_dram_ecc(topology_die_id(m->extcpu), m); + if (xec == 0 && decode_dram_ecc) { + int node_id = 0; + + if (bank_type == SMCA_UMC) { + node_id = topology_die_id(m->extcpu); + } else if (bank_type == SMCA_UMC_V2) { + /* + * SMCA_UMC_V2 exists on GPU nodes, extract the node id + * from register MCA_IPID[47:44](InstanceIdHi). + * The InstanceIdHi field represents the instance ID of the GPU. + * Which needs to be mapped to a value used by Linux, + * where GPU nodes are simply numerically after the CPU nodes. + */ + node_id = ((m->ipid >> 44) & 0xF) - + amd_gpu_node_start_id() + amd_cpu_node_count(); + } else { + return; + } + + decode_dram_ecc(node_id, m); + } } static inline void amd_decode_err_code(u16 ec)