| Message ID | 20211025144718.157794-4-marcan@marcan.st (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Apple SoC PMGR device power states driver | expand |
On Mon, 25 Oct 2021 23:47:13 +0900, Hector Martin wrote: > This syscon child node represents a single SoC device controlled by the > PMGR block. This layout allows us to declare all device power state > controls (power/clock gating and reset) in the device tree, including > dependencies, instead of hardcoding it into the driver. The register > layout is uniform. > > Each pmgr-pwrstate node provides genpd and reset features, to be > consumed by downstream device nodes. > > Future SoCs are expected to use backwards compatible registers, and the > "apple,pmgr-pwrstate" represents any such interfaces (possibly with > additional features gated by the more specific compatible), allowing > them to be bound without driver updates. If a backwards incompatible > change is introduced in future SoCs, it will require a new compatible, > such as "apple,pmgr-pwrstate-v2". > > Reviewed-by: Mark Kettenis <kettenis@openbsd.org> > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > .../bindings/power/apple,pmgr-pwrstate.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: doc reference errors (make refcheckdocs): Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml: Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml See https://patchwork.ozlabs.org/patch/1545800 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Mon, Oct 25, 2021 at 11:47:13PM +0900, Hector Martin wrote: > This syscon child node represents a single SoC device controlled by the > PMGR block. This layout allows us to declare all device power state > controls (power/clock gating and reset) in the device tree, including > dependencies, instead of hardcoding it into the driver. The register > layout is uniform. > > Each pmgr-pwrstate node provides genpd and reset features, to be > consumed by downstream device nodes. > > Future SoCs are expected to use backwards compatible registers, and the > "apple,pmgr-pwrstate" represents any such interfaces (possibly with > additional features gated by the more specific compatible), allowing > them to be bound without driver updates. If a backwards incompatible > change is introduced in future SoCs, it will require a new compatible, > such as "apple,pmgr-pwrstate-v2". > > Reviewed-by: Mark Kettenis <kettenis@openbsd.org> > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > .../bindings/power/apple,pmgr-pwrstate.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml > > diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml > new file mode 100644 > index 000000000000..010f8b641304 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Apple SoC PMGR Power States > + > +maintainers: > + - Hector Martin <marcan@marcan.st> > + > +allOf: > + - $ref: "power-domain.yaml#" > + > +description: | > + Apple SoCs include a PMGR block responsible for power management, > + which can control various clocks, resets, power states, and > + performance features. This binding describes the device power > + state registers, which control power states and resets. > + > + Each instance of a power controller within the PMGR syscon node > + represents a generic power domain provider, as documented in > + Documentation/devicetree/bindings/power/power-domain.yaml. > + The provider controls a single SoC block. The power hierarchy is > + represented via power-domains relationships between these nodes. > + > + See Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml > + for the top-level PMGR node documentation. > + > +properties: > + compatible: > + items: > + - enum: > + - apple,t8103-pmgr-pwrstate > + - const: apple,pmgr-pwrstate > + > + reg: > + maxItems: 1 > + > + "#power-domain-cells": > + const: 0 > + > + "#reset-cells": > + const: 0 > + > + power-domains: > + description: > + Reference to parent power domains. A domain may have multiple parents, > + and all will be powered up when it is powered. > + minItems: 1 > + > + label: > + description: | > + Specifies the name of the SoC domain being controlled. This is used to > + name the power/reset domains. > + > + apple,always-on: > + description: | Can drop '|' on these too. Otherwise, Reviewed-by: Rob Herring <robh@kernel.org> > + Forces this power domain to always be powered up. > + type: boolean > + > +required: > + - compatible > + - reg > + - "#power-domain-cells" > + - "#reset-cells" > + - label > + > +additionalProperties: false > -- > 2.33.0 > >
diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml new file mode 100644 index 000000000000..010f8b641304 --- /dev/null +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple SoC PMGR Power States + +maintainers: + - Hector Martin <marcan@marcan.st> + +allOf: + - $ref: "power-domain.yaml#" + +description: | + Apple SoCs include a PMGR block responsible for power management, + which can control various clocks, resets, power states, and + performance features. This binding describes the device power + state registers, which control power states and resets. + + Each instance of a power controller within the PMGR syscon node + represents a generic power domain provider, as documented in + Documentation/devicetree/bindings/power/power-domain.yaml. + The provider controls a single SoC block. The power hierarchy is + represented via power-domains relationships between these nodes. + + See Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml + for the top-level PMGR node documentation. + +properties: + compatible: + items: + - enum: + - apple,t8103-pmgr-pwrstate + - const: apple,pmgr-pwrstate + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 0 + + "#reset-cells": + const: 0 + + power-domains: + description: + Reference to parent power domains. A domain may have multiple parents, + and all will be powered up when it is powered. + minItems: 1 + + label: + description: | + Specifies the name of the SoC domain being controlled. This is used to + name the power/reset domains. + + apple,always-on: + description: | + Forces this power domain to always be powered up. + type: boolean + +required: + - compatible + - reg + - "#power-domain-cells" + - "#reset-cells" + - label + +additionalProperties: false