| Message ID | 20211012133939.2145462-1-narmstrong@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/omap: increase DSS5 max tv pclk to 192MHz | expand |
Hi Tomi, On 12/10/2021 15:39, Neil Armstrong wrote: > From: Tomi Valkeinen <tomi.valkeinen@ti.com> > > DSS5's maximum tv pclk rate (i.e. HDMI) is set to 186MHz, which comes > from the TRM (DPLL_HDMI_CLK1 frequency must be lower than 186 MHz). To > support DRA76's wide screen HDMI feature, we need to increase this > maximum rate. > > Testing shows that the PLL seems to work fine even with ~240MHz clocks, > and even the HDMI output at that clock is stable enough for monitors to > show a picture. This holds true for all DRA7 and AM5 SoCs (and probably > also for OMAP5). > > However, the highest we can go without big refactoring to the clocking > code is 192MHz, as that is the DSS func clock we get from the PRCM. So, > increase the max HDMI pixel clock to 192MHz for now, to allow some more > 2k+ modes to work. > > This patch never had a clear confirmation from HW people, but this > change stayed on production trees for multiple years without any report > on an eventual breakage. > > Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > drivers/gpu/drm/omapdrm/dss/dispc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > Tomi, > > I slighly changed the commit message to point the fact this patch has been > used in production fort years without any sign of breakage. > > Neil > > diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c > index 5619420cc2cc..3c4a4991e45a 100644 > --- a/drivers/gpu/drm/omapdrm/dss/dispc.c > +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c > @@ -4458,7 +4458,7 @@ static const struct dispc_features omap54xx_dispc_feats = { > .mgr_width_max = 4096, > .mgr_height_max = 4096, > .max_lcd_pclk = 170000000, > - .max_tv_pclk = 186000000, > + .max_tv_pclk = 192000000, > .max_downscale = 4, > .max_line_width = 2048, > .min_pcd = 1, > > base-commit: e4e737bb5c170df6135a127739a9e6148ee3da82 > Gentle ping, Neil
On 09/11/2021 15:33, Neil Armstrong wrote: > Hi Tomi, > > On 12/10/2021 15:39, Neil Armstrong wrote: >> From: Tomi Valkeinen <tomi.valkeinen@ti.com> >> >> DSS5's maximum tv pclk rate (i.e. HDMI) is set to 186MHz, which comes >> from the TRM (DPLL_HDMI_CLK1 frequency must be lower than 186 MHz). To >> support DRA76's wide screen HDMI feature, we need to increase this >> maximum rate. >> >> Testing shows that the PLL seems to work fine even with ~240MHz clocks, >> and even the HDMI output at that clock is stable enough for monitors to >> show a picture. This holds true for all DRA7 and AM5 SoCs (and probably >> also for OMAP5). >> >> However, the highest we can go without big refactoring to the clocking >> code is 192MHz, as that is the DSS func clock we get from the PRCM. So, >> increase the max HDMI pixel clock to 192MHz for now, to allow some more >> 2k+ modes to work. >> >> This patch never had a clear confirmation from HW people, but this >> change stayed on production trees for multiple years without any report >> on an eventual breakage. >> >> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> >> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> >> --- >> drivers/gpu/drm/omapdrm/dss/dispc.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> Tomi, >> >> I slighly changed the commit message to point the fact this patch has been >> used in production fort years without any sign of breakage. >> >> Neil >> >> diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c >> index 5619420cc2cc..3c4a4991e45a 100644 >> --- a/drivers/gpu/drm/omapdrm/dss/dispc.c >> +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c >> @@ -4458,7 +4458,7 @@ static const struct dispc_features omap54xx_dispc_feats = { >> .mgr_width_max = 4096, >> .mgr_height_max = 4096, >> .max_lcd_pclk = 170000000, >> - .max_tv_pclk = 186000000, >> + .max_tv_pclk = 192000000, >> .max_downscale = 4, >> .max_line_width = 2048, >> .min_pcd = 1, >> >> base-commit: e4e737bb5c170df6135a127739a9e6148ee3da82 >> > > Gentle ping, Thanks, I'll apply this to drm-misc-next. Tomi
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 5619420cc2cc..3c4a4991e45a 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -4458,7 +4458,7 @@ static const struct dispc_features omap54xx_dispc_feats = { .mgr_width_max = 4096, .mgr_height_max = 4096, .max_lcd_pclk = 170000000, - .max_tv_pclk = 186000000, + .max_tv_pclk = 192000000, .max_downscale = 4, .max_line_width = 2048, .min_pcd = 1,