Message ID | 20211110073343.12396-4-kishon@ti.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | PCI: Keystone: Misc fixes for TI's AM65x PCIe | expand |
On Wed, Nov 10, 2021 at 01:03:43PM +0530, Kishon Vijay Abraham I wrote: > + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) && > + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) { There is no need to fall back to a smaller mask, the core DMA code just cares about the addressability of the device.
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 6a352528d971..23649c01fe41 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -1203,6 +1203,12 @@ static int __init ks_pcie_probe(struct platform_device *pdev) return ret; } + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) && + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(dev, "Cannot set DMA mask\n"); + return -EINVAL; + } + ret = of_property_read_u32(np, "num-lanes", &num_lanes); if (ret) num_lanes = 1;
Set DMA mask and coherent DMA mask such to indicate the device can address the entire address space (32-bit in the case of K2G and 48-bit in the case of AM654). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/pci/controller/dwc/pci-keystone.c | 6 ++++++ 1 file changed, 6 insertions(+)