| Message ID | 2684ea9e25a63c7a88faf46680a26e560027e444.1636362169.git.greentime.hu@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: Add vector ISA support | expand |
Hi Greentime,
I love your patch! Yet something to improve:
[auto build test ERROR on v5.15]
[cannot apply to linus/master next-20211111]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Greentime-Hu/riscv-Add-vector-ISA-support/20211109-175222
base: DEBUG invalid remote for branch v5.15 8bb7eca972ad531c9b149c0a51ab43a417385813
config: riscv-allyesconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/b164ca135b641a96cea32346baec67e96bf468a2
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Greentime-Hu/riscv-Add-vector-ISA-support/20211109-175222
git checkout b164ca135b641a96cea32346baec67e96bf468a2
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv prepare
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
scripts/genksyms/parse.y: warning: 9 shift/reduce conflicts [-Wconflicts-sr]
scripts/genksyms/parse.y: warning: 5 reduce/reduce conflicts [-Wconflicts-rr]
Assembler messages:
>> Error: cannot find default versions of the ISA extension `v'
make[2]: *** [scripts/Makefile.build:379: arch/riscv/kernel/vdso/rt_sigreturn.o] Error 1
Assembler messages:
>> Error: cannot find default versions of the ISA extension `v'
Assembler messages:
>> Error: cannot find default versions of the ISA extension `v'
make[2]: *** [scripts/Makefile.build:379: arch/riscv/kernel/vdso/getcpu.o] Error 1
make[2]: *** [scripts/Makefile.build:379: arch/riscv/kernel/vdso/note.o] Error 1
Assembler messages:
>> Error: cannot find default versions of the ISA extension `v'
make[2]: *** [scripts/Makefile.build:379: arch/riscv/kernel/vdso/flush_icache.o] Error 1
make[2]: Target 'include/generated/vdso-offsets.h' not remade because of errors.
make[1]: *** [arch/riscv/Makefile:121: vdso_prepare] Error 2
make[1]: Target 'prepare' not remade because of errors.
make: *** [Makefile:219: __sub-make] Error 2
make: Target 'prepare' not remade because of errors.
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
On Tue, 09 Nov 2021 01:48:17 PST (-0800), greentime.hu@sifive.com wrote: > From: Guo Ren <guoren@linux.alibaba.com> > > This patch adds a new config option which could enable assembler's > vector feature. > > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com> > Reviewed-by: Greentime Hu <greentime.hu@sifive.com> > --- > arch/riscv/Kconfig | 9 +++++++++ > arch/riscv/Makefile | 1 + > 2 files changed, 10 insertions(+) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index f076cee11af6..0311579920b9 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -389,6 +389,15 @@ config FPU > > If you don't know what to do here, say Y. > > +config VECTOR > + bool "VECTOR support" > + default n > + help > + Say N here if you want to disable all vector related procedure > + in the kernel. > + > + If you don't know what to do here, say Y. > + > endmenu As the kernel build robot points out, this should have some sort of dependency on a vector toolchain. Not sure if there's a better way to do it that cc-option, looks like there are some other tests for assembler arguments that way. > > menu "Kernel features" > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile > index 37de70df4fae..f109214a2d7f 100644 > --- a/arch/riscv/Makefile > +++ b/arch/riscv/Makefile > @@ -57,6 +57,7 @@ riscv-march-aflags-$(CONFIG_ARCH_RV32I) := rv32ima > riscv-march-aflags-$(CONFIG_ARCH_RV64I) := rv64ima > riscv-march-aflags-$(CONFIG_FPU) := $(riscv-march-aflags-y)fd > riscv-march-aflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-aflags-y)c > +riscv-march-aflags-$(CONFIG_VECTOR) := $(riscv-march-aflags-y)v > > KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) > KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index f076cee11af6..0311579920b9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -389,6 +389,15 @@ config FPU If you don't know what to do here, say Y. +config VECTOR + bool "VECTOR support" + default n + help + Say N here if you want to disable all vector related procedure + in the kernel. + + If you don't know what to do here, say Y. + endmenu menu "Kernel features" diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 37de70df4fae..f109214a2d7f 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -57,6 +57,7 @@ riscv-march-aflags-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-aflags-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-aflags-$(CONFIG_FPU) := $(riscv-march-aflags-y)fd riscv-march-aflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-aflags-y)c +riscv-march-aflags-$(CONFIG_VECTOR) := $(riscv-march-aflags-y)v KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)