diff mbox series

[4/4] arm64: dts: imx8ulp-evk: enable fec

Message ID 20211120115825.851798-5-peng.fan@oss.nxp.com (mailing list archive)
State Not Applicable
Headers show
Series dt-bindings/dts: add i.MX8ULP FEC | expand

Checks

Context Check Description
netdev/tree_selection success Not a local patch

Commit Message

Peng Fan (OSS) Nov. 20, 2021, 11:58 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>

Enable fec, add pinctrl for fec

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Andrew Lunn Nov. 20, 2021, 3:26 p.m. UTC | #1 
> +&fec {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_enet>;
> +	phy-mode = "rmii";

Is this really a Fast Ethernet? Not 1G?

> +	phy-handle = <&ethphy>;
> +	status = "okay";
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		ethphy: ethernet-phy {
> +			reg = <1>;

I'm surprised this does not give warnings from the DTS tools. There is
a reg value, so it should be ethernet-phy@1

  Andrew
Peng Fan Nov. 22, 2021, 1:04 a.m. UTC | #2 
> Subject: Re: [PATCH 4/4] arm64: dts: imx8ulp-evk: enable fec
> 
> > +&fec {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_enet>;
> > +	phy-mode = "rmii";
> 
> Is this really a Fast Ethernet? Not 1G?

Not 1G. it only support 10M/100M ethernet.

> 
> > +	phy-handle = <&ethphy>;
> > +	status = "okay";
> > +
> > +	mdio {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		ethphy: ethernet-phy {
> > +			reg = <1>;
> 
> I'm surprised this does not give warnings from the DTS tools. There is a reg
> value, so it should be ethernet-phy@1

I not see warning per my build:
"
*** Default configuration is based on 'defconfig'
#
# No change to .config
#
  CALL    scripts/atomic/check-atomics.sh
  CALL    scripts/checksyscalls.sh
  CHK     include/generated/compile.h
  DTC     arch/arm64/boot/dts/freescale/imx8ulp-evk.dtb
"
Anyway I will check and fix if the node needs a fix.

Thanks,
Peng

> 
>   Andrew
Joakim Zhang Nov. 22, 2021, 2:08 a.m. UTC | #3 
Hi Peng,

> -----Original Message-----
> From: Peng Fan <peng.fan@nxp.com>
> Sent: 2021年11月22日 9:04
> To: Andrew Lunn <andrew@lunn.ch>; Peng Fan (OSS)
> <peng.fan@oss.nxp.com>
> Cc: robh+dt@kernel.org; Aisheng Dong <aisheng.dong@nxp.com>; Joakim
> Zhang <qiangqing.zhang@nxp.com>; davem@davemloft.net;
> kuba@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de;
> kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx
> <linux-imx@nxp.com>; netdev@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org
> Subject: RE: [PATCH 4/4] arm64: dts: imx8ulp-evk: enable fec
> 
> > Subject: Re: [PATCH 4/4] arm64: dts: imx8ulp-evk: enable fec
> >
> > > +&fec {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_enet>;
> > > +	phy-mode = "rmii";
> >
> > Is this really a Fast Ethernet? Not 1G?
> 
> Not 1G. it only support 10M/100M ethernet.
> 
> >
> > > +	phy-handle = <&ethphy>;
> > > +	status = "okay";
> > > +
> > > +	mdio {
> > > +		#address-cells = <1>;
> > > +		#size-cells = <0>;
> > > +
> > > +		ethphy: ethernet-phy {
> > > +			reg = <1>;
> >
> > I'm surprised this does not give warnings from the DTS tools. There is
> > a reg value, so it should be ethernet-phy@1
> 
> I not see warning per my build:
> "
> *** Default configuration is based on 'defconfig'
> #
> # No change to .config
> #
>   CALL    scripts/atomic/check-atomics.sh
>   CALL    scripts/checksyscalls.sh
>   CHK     include/generated/compile.h
>   DTC     arch/arm64/boot/dts/freescale/imx8ulp-evk.dtb
> "
> Anyway I will check and fix if the node needs a fix.

According to PHY guide, Documentation/devicetree/bindings/net/ethernet-phy.yaml, yes, we need write to ' ethernet-phy@1'.

DTS tool may not complain it, I guess 'make dtbs_check' could give a warning...

Best Regards,
Joakim Zhang
> Thanks,
> Peng
> 
> >
> >   Andrew
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 33e84c4e9ed8..7103fed3a6cc 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -21,6 +21,24 @@  memory@80000000 {
 	};
 };
 
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "rmii";
+	phy-handle = <&ethphy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy: ethernet-phy {
+			reg = <1>;
+			micrel,led-mode = <1>;
+		};
+	};
+};
+
 &lpuart5 {
 	/* console */
 	pinctrl-names = "default", "sleep";
@@ -39,6 +57,22 @@  &usdhc0 {
 };
 
 &iomuxc1 {
+	pinctrl_enet: enetgrp {
+		fsl,pins = <
+			MX8ULP_PAD_PTE15__ENET0_MDC     0x43
+			MX8ULP_PAD_PTE14__ENET0_MDIO    0x43
+			MX8ULP_PAD_PTE17__ENET0_RXER    0x43
+			MX8ULP_PAD_PTE18__ENET0_CRS_DV  0x43
+			MX8ULP_PAD_PTF1__ENET0_RXD0     0x43
+			MX8ULP_PAD_PTE20__ENET0_RXD1    0x43
+			MX8ULP_PAD_PTE16__ENET0_TXEN    0x43
+			MX8ULP_PAD_PTE23__ENET0_TXD0    0x43
+			MX8ULP_PAD_PTE22__ENET0_TXD1    0x43
+			MX8ULP_PAD_PTE19__ENET0_REFCLK  0x43
+			MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
+		>;
+	};
+
 	pinctrl_lpuart5: lpuart5grp {
 		fsl,pins = <
 			MX8ULP_PAD_PTF14__LPUART5_TX	0x3