| Message ID | 20211120115825.851798-4-peng.fan@oss.nxp.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | dt-bindings/dts: add i.MX8ULP FEC | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Not a local patch |
Hi Peng, I saw it's not the latest version(clock setting) compared to our local implementation, could you help update it or need a follow up later? Best Regards, Joakim Zhang > -----Original Message----- > From: Peng Fan (OSS) <peng.fan@oss.nxp.com> > Sent: 2021年11月20日 19:58 > To: robh+dt@kernel.org; Aisheng Dong <aisheng.dong@nxp.com>; Joakim > Zhang <qiangqing.zhang@nxp.com>; davem@davemloft.net; > kuba@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de > Cc: kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx > <linux-imx@nxp.com>; netdev@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; Peng Fan <peng.fan@nxp.com> > Subject: [PATCH 3/4] arm64: dts: imx8ulp: add fec node > > From: Peng Fan <peng.fan@nxp.com> > > Add ethernet node and its alias > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > index edac63cf3668..e3c658b45ae6 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -16,6 +16,7 @@ / { > #size-cells = <2>; > > aliases { > + ethernet0 = &fec; > gpio0 = &gpiod; > gpio1 = &gpioe; > gpio2 = &gpiof; > @@ -365,6 +366,23 @@ usdhc2: mmc@298f0000 { > bus-width = <4>; > status = "disabled"; > }; > + > + fec: ethernet@29950000 { > + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec"; > + reg = <0x29950000 0x10000>; > + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "int0"; > + clocks = <&pcc4 IMX8ULP_CLK_ENET>, > + <&pcc4 IMX8ULP_CLK_ENET>, > + <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>; > + clock-names = "ipg", "ahb", "ptp"; > + assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>; > + assigned-clock-parents = <&sosc>; > + assigned-clock-rates = <24000000>; > + fsl,num-tx-queues = <1>; > + fsl,num-rx-queues = <1>; > + status = "disabled"; > + }; > }; > > gpioe: gpio@2d000000 { > -- > 2.25.1
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index edac63cf3668..e3c658b45ae6 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -16,6 +16,7 @@ / { #size-cells = <2>; aliases { + ethernet0 = &fec; gpio0 = &gpiod; gpio1 = &gpioe; gpio2 = &gpiof; @@ -365,6 +366,23 @@ usdhc2: mmc@298f0000 { bus-width = <4>; status = "disabled"; }; + + fec: ethernet@29950000 { + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec"; + reg = <0x29950000 0x10000>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0"; + clocks = <&pcc4 IMX8ULP_CLK_ENET>, + <&pcc4 IMX8ULP_CLK_ENET>, + <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>; + clock-names = "ipg", "ahb", "ptp"; + assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>; + assigned-clock-parents = <&sosc>; + assigned-clock-rates = <24000000>; + fsl,num-tx-queues = <1>; + fsl,num-rx-queues = <1>; + status = "disabled"; + }; }; gpioe: gpio@2d000000 {