| Message ID | 20211118154903.4.Ibb71b3c64d6f98d586131a143c27fbdb233260a1@changeid (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/msm: Increase gpu boost interval | expand |
Hi Akhil,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip drm-exynos/exynos-drm-next v5.16-rc1 next-20211118]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Akhil-P-Oommen/drm-msm-Increase-gpu-boost-interval/20211118-182201
base: git://anongit.freedesktop.org/drm/drm drm-next
config: alpha-randconfig-r032-20211118 (attached as .config)
compiler: alpha-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/06feaa95e96ec85824f0e65134de626d61308d11
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Akhil-P-Oommen/drm-msm-Increase-gpu-boost-interval/20211118-182201
git checkout 06feaa95e96ec85824f0e65134de626d61308d11
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=alpha
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c: In function 'a6xx_show':
>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:1230:43: warning: format '%d' expects argument of type 'int', but argument 3 has type 'size_t' {aka 'long unsigned int'} [-Wformat=]
1230 | drm_printf(p, " size: %d\n", gmu_log->size);
| ~^ ~~~~~~~~~~~~~
| | |
| int size_t {aka long unsigned int}
| %ld
vim +1230 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
1212
1213 void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
1214 struct drm_printer *p)
1215 {
1216 struct a6xx_gpu_state *a6xx_state = container_of(state,
1217 struct a6xx_gpu_state, base);
1218 int i;
1219
1220 if (IS_ERR_OR_NULL(state))
1221 return;
1222
1223 adreno_show(gpu, state, p);
1224
1225 drm_puts(p, "gmu-log:\n");
1226 if (a6xx_state->gmu_log) {
1227 struct msm_gpu_state_bo *gmu_log = a6xx_state->gmu_log;
1228
1229 drm_printf(p, " iova: 0x%016llx\n", gmu_log->iova);
> 1230 drm_printf(p, " size: %d\n", gmu_log->size);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
On Thu, Nov 18, 2021 at 2:21 AM Akhil P Oommen <akhilpo@codeaurora.org> wrote: > > Capture gmu log in coredump to enhance debugging. > > Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> > --- > > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 +++++++++++++++++++++++++++++ > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 ++ > 3 files changed, 44 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > index 7501849..9fa3fa6 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > @@ -42,6 +42,8 @@ struct a6xx_gpu_state { > struct a6xx_gpu_state_obj *cx_debugbus; > int nr_cx_debugbus; > > + struct msm_gpu_state_bo *gmu_log; > + > struct list_head objs; > }; > > @@ -800,6 +802,30 @@ static void a6xx_get_gmu_registers(struct msm_gpu *gpu, > &a6xx_state->gmu_registers[2], false); > } > > +static void a6xx_get_gmu_log(struct msm_gpu *gpu, > + struct a6xx_gpu_state *a6xx_state) > +{ > + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > + struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); > + struct a6xx_gmu *gmu = &a6xx_gpu->gmu; > + struct msm_gpu_state_bo *gmu_log; > + > + gmu_log = state_kcalloc(a6xx_state, > + 1, sizeof(*a6xx_state->gmu_log)); > + if (!gmu_log) > + return; > + > + gmu_log->iova = gmu->log.iova; > + gmu_log->size = gmu->log.size; > + gmu_log->data = kvzalloc(gmu_log->size, GFP_KERNEL); > + if (!gmu_log->data) > + return; > + > + memcpy(gmu_log->data, gmu->log.virt, gmu->log.size); > + > + a6xx_state->gmu_log = gmu_log; > +} > + > #define A6XX_GBIF_REGLIST_SIZE 1 > static void a6xx_get_registers(struct msm_gpu *gpu, > struct a6xx_gpu_state *a6xx_state, > @@ -937,6 +963,8 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu) > > a6xx_get_gmu_registers(gpu, a6xx_state); > > + a6xx_get_gmu_log(gpu, a6xx_state); > + > /* If GX isn't on the rest of the data isn't going to be accessible */ > if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) > return &a6xx_state->base; > @@ -978,6 +1006,9 @@ static void a6xx_gpu_state_destroy(struct kref *kref) > struct a6xx_gpu_state *a6xx_state = container_of(state, > struct a6xx_gpu_state, base); > > + if (a6xx_state->gmu_log && a6xx_state->gmu_log->data) > + kvfree(a6xx_state->gmu_log->data); > + > list_for_each_entry_safe(obj, tmp, &a6xx_state->objs, node) > kfree(obj); > > @@ -1191,6 +1222,16 @@ void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state, > > adreno_show(gpu, state, p); > > + drm_puts(p, "gmu-log:\n"); > + if (a6xx_state->gmu_log) { > + struct msm_gpu_state_bo *gmu_log = a6xx_state->gmu_log; > + > + drm_printf(p, " iova: 0x%016llx\n", gmu_log->iova); > + drm_printf(p, " size: %d\n", gmu_log->size); fwiw, that wants to be: + drm_printf(p, " size: %zu\n", gmu_log->size); with that fixed, r-b BR, -R > + adreno_show_object(p, &gmu_log->data, gmu_log->size, > + &gmu_log->encoded); > + } > + > drm_puts(p, "registers:\n"); > for (i = 0; i < a6xx_state->nr_registers; i++) { > struct a6xx_gpu_state_obj *obj = &a6xx_state->registers[i]; > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index 7486652..7d1ff20 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -630,7 +630,7 @@ static char *adreno_gpu_ascii85_encode(u32 *src, size_t len) > } > > /* len is expected to be in bytes */ > -static void adreno_show_object(struct drm_printer *p, void **ptr, int len, > +void adreno_show_object(struct drm_printer *p, void **ptr, int len, > bool *encoded) > { > if (!*ptr || !len) > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index 225c277..6762308 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -306,6 +306,8 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state); > > int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state); > int adreno_gpu_state_put(struct msm_gpu_state *state); > +void adreno_show_object(struct drm_printer *p, void **ptr, int len, > + bool *encoded); > > /* > * Common helper function to initialize the default address space for arm-smmu > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation. >
On Mon, Nov 22, 2021 at 10:26 AM Rob Clark <robdclark@gmail.com> wrote: > > On Thu, Nov 18, 2021 at 2:21 AM Akhil P Oommen <akhilpo@codeaurora.org> wrote: > > > > Capture gmu log in coredump to enhance debugging. > > > > Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> > > --- > > > > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 +++++++++++++++++++++++++++++ > > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 ++ > > 3 files changed, 44 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > > index 7501849..9fa3fa6 100644 > > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > > @@ -42,6 +42,8 @@ struct a6xx_gpu_state { > > struct a6xx_gpu_state_obj *cx_debugbus; > > int nr_cx_debugbus; > > > > + struct msm_gpu_state_bo *gmu_log; > > + > > struct list_head objs; > > }; > > > > @@ -800,6 +802,30 @@ static void a6xx_get_gmu_registers(struct msm_gpu *gpu, > > &a6xx_state->gmu_registers[2], false); > > } > > > > +static void a6xx_get_gmu_log(struct msm_gpu *gpu, > > + struct a6xx_gpu_state *a6xx_state) > > +{ > > + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > > + struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); > > + struct a6xx_gmu *gmu = &a6xx_gpu->gmu; > > + struct msm_gpu_state_bo *gmu_log; > > + > > + gmu_log = state_kcalloc(a6xx_state, > > + 1, sizeof(*a6xx_state->gmu_log)); > > + if (!gmu_log) > > + return; > > + > > + gmu_log->iova = gmu->log.iova; > > + gmu_log->size = gmu->log.size; > > + gmu_log->data = kvzalloc(gmu_log->size, GFP_KERNEL); > > + if (!gmu_log->data) > > + return; > > + > > + memcpy(gmu_log->data, gmu->log.virt, gmu->log.size); > > + > > + a6xx_state->gmu_log = gmu_log; > > +} > > + > > #define A6XX_GBIF_REGLIST_SIZE 1 > > static void a6xx_get_registers(struct msm_gpu *gpu, > > struct a6xx_gpu_state *a6xx_state, > > @@ -937,6 +963,8 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu) > > > > a6xx_get_gmu_registers(gpu, a6xx_state); > > > > + a6xx_get_gmu_log(gpu, a6xx_state); > > + > > /* If GX isn't on the rest of the data isn't going to be accessible */ > > if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) > > return &a6xx_state->base; > > @@ -978,6 +1006,9 @@ static void a6xx_gpu_state_destroy(struct kref *kref) > > struct a6xx_gpu_state *a6xx_state = container_of(state, > > struct a6xx_gpu_state, base); > > > > + if (a6xx_state->gmu_log && a6xx_state->gmu_log->data) > > + kvfree(a6xx_state->gmu_log->data); > > + > > list_for_each_entry_safe(obj, tmp, &a6xx_state->objs, node) > > kfree(obj); > > > > @@ -1191,6 +1222,16 @@ void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state, > > > > adreno_show(gpu, state, p); > > > > + drm_puts(p, "gmu-log:\n"); > > + if (a6xx_state->gmu_log) { > > + struct msm_gpu_state_bo *gmu_log = a6xx_state->gmu_log; > > + > > + drm_printf(p, " iova: 0x%016llx\n", gmu_log->iova); > > + drm_printf(p, " size: %d\n", gmu_log->size); > > fwiw, that wants to be: > > + drm_printf(p, " size: %zu\n", gmu_log->size); > > with that fixed, r-b Hmm, actually, I seem to be getting an empty log.. is special gmu fw, or non-fused device needed for this to work? BR, -R > BR, > -R > > > + adreno_show_object(p, &gmu_log->data, gmu_log->size, > > + &gmu_log->encoded); > > + } > > + > > drm_puts(p, "registers:\n"); > > for (i = 0; i < a6xx_state->nr_registers; i++) { > > struct a6xx_gpu_state_obj *obj = &a6xx_state->registers[i]; > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > > index 7486652..7d1ff20 100644 > > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > > @@ -630,7 +630,7 @@ static char *adreno_gpu_ascii85_encode(u32 *src, size_t len) > > } > > > > /* len is expected to be in bytes */ > > -static void adreno_show_object(struct drm_printer *p, void **ptr, int len, > > +void adreno_show_object(struct drm_printer *p, void **ptr, int len, > > bool *encoded) > > { > > if (!*ptr || !len) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > > index 225c277..6762308 100644 > > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > > @@ -306,6 +306,8 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state); > > > > int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state); > > int adreno_gpu_state_put(struct msm_gpu_state *state); > > +void adreno_show_object(struct drm_printer *p, void **ptr, int len, > > + bool *encoded); > > > > /* > > * Common helper function to initialize the default address space for arm-smmu > > -- > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > > of Code Aurora Forum, hosted by The Linux Foundation. > >
On 11/23/2021 12:36 AM, Rob Clark wrote: > On Mon, Nov 22, 2021 at 10:26 AM Rob Clark <robdclark@gmail.com> wrote: >> >> On Thu, Nov 18, 2021 at 2:21 AM Akhil P Oommen <akhilpo@codeaurora.org> wrote: >>> >>> Capture gmu log in coredump to enhance debugging. >>> >>> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> >>> --- >>> >>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 +++++++++++++++++++++++++++++ >>> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- >>> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 ++ >>> 3 files changed, 44 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c >>> index 7501849..9fa3fa6 100644 >>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c >>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c >>> @@ -42,6 +42,8 @@ struct a6xx_gpu_state { >>> struct a6xx_gpu_state_obj *cx_debugbus; >>> int nr_cx_debugbus; >>> >>> + struct msm_gpu_state_bo *gmu_log; >>> + >>> struct list_head objs; >>> }; >>> >>> @@ -800,6 +802,30 @@ static void a6xx_get_gmu_registers(struct msm_gpu *gpu, >>> &a6xx_state->gmu_registers[2], false); >>> } >>> >>> +static void a6xx_get_gmu_log(struct msm_gpu *gpu, >>> + struct a6xx_gpu_state *a6xx_state) >>> +{ >>> + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); >>> + struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); >>> + struct a6xx_gmu *gmu = &a6xx_gpu->gmu; >>> + struct msm_gpu_state_bo *gmu_log; >>> + >>> + gmu_log = state_kcalloc(a6xx_state, >>> + 1, sizeof(*a6xx_state->gmu_log)); >>> + if (!gmu_log) >>> + return; >>> + >>> + gmu_log->iova = gmu->log.iova; >>> + gmu_log->size = gmu->log.size; >>> + gmu_log->data = kvzalloc(gmu_log->size, GFP_KERNEL); >>> + if (!gmu_log->data) >>> + return; >>> + >>> + memcpy(gmu_log->data, gmu->log.virt, gmu->log.size); >>> + >>> + a6xx_state->gmu_log = gmu_log; >>> +} >>> + >>> #define A6XX_GBIF_REGLIST_SIZE 1 >>> static void a6xx_get_registers(struct msm_gpu *gpu, >>> struct a6xx_gpu_state *a6xx_state, >>> @@ -937,6 +963,8 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu) >>> >>> a6xx_get_gmu_registers(gpu, a6xx_state); >>> >>> + a6xx_get_gmu_log(gpu, a6xx_state); >>> + >>> /* If GX isn't on the rest of the data isn't going to be accessible */ >>> if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) >>> return &a6xx_state->base; >>> @@ -978,6 +1006,9 @@ static void a6xx_gpu_state_destroy(struct kref *kref) >>> struct a6xx_gpu_state *a6xx_state = container_of(state, >>> struct a6xx_gpu_state, base); >>> >>> + if (a6xx_state->gmu_log && a6xx_state->gmu_log->data) >>> + kvfree(a6xx_state->gmu_log->data); >>> + >>> list_for_each_entry_safe(obj, tmp, &a6xx_state->objs, node) >>> kfree(obj); >>> >>> @@ -1191,6 +1222,16 @@ void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state, >>> >>> adreno_show(gpu, state, p); >>> >>> + drm_puts(p, "gmu-log:\n"); >>> + if (a6xx_state->gmu_log) { >>> + struct msm_gpu_state_bo *gmu_log = a6xx_state->gmu_log; >>> + >>> + drm_printf(p, " iova: 0x%016llx\n", gmu_log->iova); >>> + drm_printf(p, " size: %d\n", gmu_log->size); >> >> fwiw, that wants to be: >> >> + drm_printf(p, " size: %zu\n", gmu_log->size); >> >> with that fixed, r-b > > Hmm, actually, I seem to be getting an empty log.. is special gmu fw, > or non-fused device needed for this to work? > > BR, > -R No, there is no special fw. I tested this on 7c3 and it worked for me. a618/a630 has an old version of gmu firmware which is pretty different from the newer ones. Let me check. -Akhil. > >> BR, >> -R >> >>> + adreno_show_object(p, &gmu_log->data, gmu_log->size, >>> + &gmu_log->encoded); >>> + } >>> + >>> drm_puts(p, "registers:\n"); >>> for (i = 0; i < a6xx_state->nr_registers; i++) { >>> struct a6xx_gpu_state_obj *obj = &a6xx_state->registers[i]; >>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c >>> index 7486652..7d1ff20 100644 >>> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c >>> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c >>> @@ -630,7 +630,7 @@ static char *adreno_gpu_ascii85_encode(u32 *src, size_t len) >>> } >>> >>> /* len is expected to be in bytes */ >>> -static void adreno_show_object(struct drm_printer *p, void **ptr, int len, >>> +void adreno_show_object(struct drm_printer *p, void **ptr, int len, >>> bool *encoded) >>> { >>> if (!*ptr || !len) >>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h >>> index 225c277..6762308 100644 >>> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h >>> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h >>> @@ -306,6 +306,8 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state); >>> >>> int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state); >>> int adreno_gpu_state_put(struct msm_gpu_state *state); >>> +void adreno_show_object(struct drm_printer *p, void **ptr, int len, >>> + bool *encoded); >>> >>> /* >>> * Common helper function to initialize the default address space for arm-smmu >>> -- >>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member >>> of Code Aurora Forum, hosted by The Linux Foundation. >>>
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c index 7501849..9fa3fa6 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c @@ -42,6 +42,8 @@ struct a6xx_gpu_state { struct a6xx_gpu_state_obj *cx_debugbus; int nr_cx_debugbus; + struct msm_gpu_state_bo *gmu_log; + struct list_head objs; }; @@ -800,6 +802,30 @@ static void a6xx_get_gmu_registers(struct msm_gpu *gpu, &a6xx_state->gmu_registers[2], false); } +static void a6xx_get_gmu_log(struct msm_gpu *gpu, + struct a6xx_gpu_state *a6xx_state) +{ + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); + struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); + struct a6xx_gmu *gmu = &a6xx_gpu->gmu; + struct msm_gpu_state_bo *gmu_log; + + gmu_log = state_kcalloc(a6xx_state, + 1, sizeof(*a6xx_state->gmu_log)); + if (!gmu_log) + return; + + gmu_log->iova = gmu->log.iova; + gmu_log->size = gmu->log.size; + gmu_log->data = kvzalloc(gmu_log->size, GFP_KERNEL); + if (!gmu_log->data) + return; + + memcpy(gmu_log->data, gmu->log.virt, gmu->log.size); + + a6xx_state->gmu_log = gmu_log; +} + #define A6XX_GBIF_REGLIST_SIZE 1 static void a6xx_get_registers(struct msm_gpu *gpu, struct a6xx_gpu_state *a6xx_state, @@ -937,6 +963,8 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu) a6xx_get_gmu_registers(gpu, a6xx_state); + a6xx_get_gmu_log(gpu, a6xx_state); + /* If GX isn't on the rest of the data isn't going to be accessible */ if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) return &a6xx_state->base; @@ -978,6 +1006,9 @@ static void a6xx_gpu_state_destroy(struct kref *kref) struct a6xx_gpu_state *a6xx_state = container_of(state, struct a6xx_gpu_state, base); + if (a6xx_state->gmu_log && a6xx_state->gmu_log->data) + kvfree(a6xx_state->gmu_log->data); + list_for_each_entry_safe(obj, tmp, &a6xx_state->objs, node) kfree(obj); @@ -1191,6 +1222,16 @@ void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state, adreno_show(gpu, state, p); + drm_puts(p, "gmu-log:\n"); + if (a6xx_state->gmu_log) { + struct msm_gpu_state_bo *gmu_log = a6xx_state->gmu_log; + + drm_printf(p, " iova: 0x%016llx\n", gmu_log->iova); + drm_printf(p, " size: %d\n", gmu_log->size); + adreno_show_object(p, &gmu_log->data, gmu_log->size, + &gmu_log->encoded); + } + drm_puts(p, "registers:\n"); for (i = 0; i < a6xx_state->nr_registers; i++) { struct a6xx_gpu_state_obj *obj = &a6xx_state->registers[i]; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 7486652..7d1ff20 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -630,7 +630,7 @@ static char *adreno_gpu_ascii85_encode(u32 *src, size_t len) } /* len is expected to be in bytes */ -static void adreno_show_object(struct drm_printer *p, void **ptr, int len, +void adreno_show_object(struct drm_printer *p, void **ptr, int len, bool *encoded) { if (!*ptr || !len) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 225c277..6762308 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -306,6 +306,8 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state); int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state); int adreno_gpu_state_put(struct msm_gpu_state *state); +void adreno_show_object(struct drm_printer *p, void **ptr, int len, + bool *encoded); /* * Common helper function to initialize the default address space for arm-smmu
Capture gmu log in coredump to enhance debugging. Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 +++++++++++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 ++ 3 files changed, 44 insertions(+), 1 deletion(-)